| Message ID | 1385451313-1875-5-git-send-email-sourav.poddar@ti.com |
|---|---|
| State | Not Applicable |
| Headers | show |
On Tue, Nov 26, 2013 at 01:05:00PM +0530, Sourav Poddar wrote: > In qspi controller, we need to switch to memory mapped operations. > These switching depends on This will need to be added to the DT binding.
On Tuesday 26 November 2013 04:01 PM, Mark Brown wrote: > On Tue, Nov 26, 2013 at 01:05:00PM +0530, Sourav Poddar wrote: >> In qspi controller, we need to switch to memory mapped operations. >> These switching depends on > This will need to be added to the DT binding. I have added a "reg-name" property. Does we need to add individual reg-names also?
On Tue, Nov 26, 2013 at 04:48:58PM +0530, Sourav Poddar wrote: > On Tuesday 26 November 2013 04:01 PM, Mark Brown wrote: > >On Tue, Nov 26, 2013 at 01:05:00PM +0530, Sourav Poddar wrote: > >>In qspi controller, we need to switch to memory mapped operations. > >>These switching depends on > >This will need to be added to the DT binding. > I have added a "reg-name" property. Does we need to add individual > reg-names also? I don't understand what you mean by "individual reg-names"?
On Tuesday 26 November 2013 05:55 PM, Mark Brown wrote: > On Tue, Nov 26, 2013 at 04:48:58PM +0530, Sourav Poddar wrote: >> On Tuesday 26 November 2013 04:01 PM, Mark Brown wrote: >>> On Tue, Nov 26, 2013 at 01:05:00PM +0530, Sourav Poddar wrote: >>>> In qspi controller, we need to switch to memory mapped operations. >>>> These switching depends on >>> This will need to be added to the DT binding. >> I have added a "reg-name" property. Does we need to add individual >> reg-names also? > I don't understand what you mean by "individual reg-names"? I have added a binding named "reg-names" in my documentation patch.
On Tue, Nov 26, 2013 at 06:08:34PM +0530, Sourav Poddar wrote: > On Tuesday 26 November 2013 05:55 PM, Mark Brown wrote: > >On Tue, Nov 26, 2013 at 04:48:58PM +0530, Sourav Poddar wrote: > >>I have added a "reg-name" property. Does we need to add individual > >>reg-names also? > >I don't understand what you mean by "individual reg-names"? > I have added a binding named "reg-names" in my documentation > patch. OK, but I stil don't understand the above?
On Tuesday 26 November 2013 06:25 PM, Mark Brown wrote: > On Tue, Nov 26, 2013 at 06:08:34PM +0530, Sourav Poddar wrote: >> On Tuesday 26 November 2013 05:55 PM, Mark Brown wrote: >>> On Tue, Nov 26, 2013 at 04:48:58PM +0530, Sourav Poddar wrote: >>>> I have added a "reg-name" property. Does we need to add individual >>>> reg-names also? >>> I don't understand what you mean by "individual reg-names"? >> I have added a binding named "reg-names" in my documentation >> patch. > OK, but I stil don't understand the above? I mean to say, do I need to document "qspi_base", "qspi_ctrlmod" register names also which I have used in omy dts files.
On Tue, Nov 26, 2013 at 06:30:15PM +0530, Sourav Poddar wrote: > I mean to say, do I need to document "qspi_base", "qspi_ctrlmod" > register names > also which I have used in omy dts files. Yes, you need to document what the valid names are and what they mean.
On Tuesday 26 November 2013 06:49 PM, Mark Brown wrote: > On Tue, Nov 26, 2013 at 06:30:15PM +0530, Sourav Poddar wrote: > >> I mean to say, do I need to document "qspi_base", "qspi_ctrlmod" >> register names >> also which I have used in omy dts files. > Yes, you need to document what the valid names are and what they mean. Ok, will do that. Thanks
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 67aa905..776e93d 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -46,6 +46,7 @@ struct ti_qspi { struct spi_master *master; void __iomem *base; + void __iomem *ctrl_base; struct clk *fclk; struct device *dev; @@ -54,6 +55,8 @@ struct ti_qspi { u32 spi_max_frequency; u32 cmd; u32 dc; + + bool ctrl_mod; }; #define QSPI_PID (0x0) @@ -437,7 +440,7 @@ static int ti_qspi_probe(struct platform_device *pdev) { struct ti_qspi *qspi; struct spi_master *master; - struct resource *r; + struct resource *r, *res_ctrl; struct device_node *np = pdev->dev.of_node; u32 max_freq; int ret = 0, num_cs, irq; @@ -471,6 +474,9 @@ static int ti_qspi_probe(struct platform_device *pdev) return -ENODEV; } + res_ctrl = platform_get_resource_byname(pdev, + IORESOURCE_MEM, "qspi_ctrlmod"); + irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "no irq resource?\n"); @@ -485,6 +491,15 @@ static int ti_qspi_probe(struct platform_device *pdev) goto free_master; } + if (res_ctrl) { + qspi->ctrl_mod = true; + qspi->ctrl_base = devm_ioremap_resource(&pdev->dev, res_ctrl); + if (IS_ERR(qspi->ctrl_base)) { + ret = PTR_ERR(qspi->ctrl_base); + goto free_master; + } + } + ret = devm_request_irq(&pdev->dev, irq, ti_qspi_isr, 0, dev_name(&pdev->dev), qspi); if (ret < 0) {
In qspi controller, we need to switch to memory mapped operations. These switching depends on 1. For DRA7x: qspi register bit and control module register. 2. For AM437x: qspi register bit. Hence add support for parsing control module register and provide a flag "ctrl_mod" which can be used for conditional execution of control module part. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> --- drivers/spi/spi-ti-qspi.c | 17 ++++++++++++++++- 1 files changed, 16 insertions(+), 1 deletions(-)