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[216.31.211.11]) by mx.google.com with ESMTPSA id ru3sm109722obc.2.2013.11.14.15.18.38 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 14 Nov 2013 15:18:38 -0800 (PST) From: Brian Norris To: Subject: [PATCH] mtd: nand: pxa3xx: make ECC configuration checks more explicit Date: Thu, 14 Nov 2013 15:18:28 -0800 Message-Id: <1384471108-28188-1-git-send-email-computersforpeace@gmail.com> X-Mailer: git-send-email 1.8.4.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131114_181900_754676_150E258F X-CRM114-Status: GOOD ( 10.53 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (computersforpeace[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Brian Norris , Ezequiel Garcia X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The Armada BCH configuration in this driver uses one of the two following ECC schemes: 16-bit correction per 2048 bytes 16-bit correction per 1024 bytes These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit per 512-bytes (respectively) minimum correctability requirements of many common NAND. The current code only checks for the required strength (4-bit or 8-bit) without checking the ECC step size that is associated with that strength (and simply assumes it is 512). While that is often a safe assumption to make, let's make it explicit, since we have that information. Signed-off-by: Brian Norris Cc: Ezequiel Garcia Acked-by: Ezequiel Garcia --- drivers/mtd/nand/pxa3xx_nand.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index cec81f0..3d143fe 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -1364,9 +1364,13 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info, static int armada370_ecc_init(struct pxa3xx_nand_info *info, struct nand_ecc_ctrl *ecc, - int strength, int page_size) + int strength, int ecc_stepsize, int page_size) { - if (strength == 4 && page_size == 4096) { + /* + * Required ECC: 4-bit correction per 512 bytes + * Select: 16-bit correction per 2048 bytes + */ + if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) { info->ecc_bch = 1; info->chunk_size = 2048; info->spare_size = 32; @@ -1377,7 +1381,11 @@ static int armada370_ecc_init(struct pxa3xx_nand_info *info, ecc->strength = 16; return 1; - } else if (strength == 8 && page_size == 4096) { + /* + * Required ECC: 8-bit correction per 512 bytes + * Select: 16-bit correction per 1024 bytes + */ + } else if (strength == 8 && ecc_stepsize == 512 && page_size == 4096) { info->ecc_bch = 1; info->chunk_size = 1024; info->spare_size = 0; @@ -1485,6 +1493,7 @@ KEEP_CONFIG: if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) ret = armada370_ecc_init(info, &chip->ecc, chip->ecc_strength_ds, + chip->ecc_step_ds, mtd->writesize); else ret = pxa_ecc_init(info, &chip->ecc,