@@ -108,25 +108,6 @@ enum aarch64_symbol_type
cost models and vectors for address cost calculations, register
move costs and memory move costs. */
-/* Extra costs for specific insns. Only records the cost above a
- single insn. */
-
-struct cpu_rtx_cost_table
-{
- const int memory_load;
- const int memory_store;
- const int register_shift;
- const int int_divide;
- const int float_divide;
- const int double_divide;
- const int int_multiply;
- const int int_multiply_extend;
- const int int_multiply_add;
- const int int_multiply_extend_add;
- const int float_multiply;
- const int double_multiply;
-};
-
/* Additional cost for addresses. */
struct cpu_addrcost_table
{
@@ -170,7 +151,7 @@ struct cpu_vector_cost
struct tune_params
{
- const struct cpu_rtx_cost_table *const insn_extra_cost;
+ const struct cpu_cost_table *const insn_extra_cost;
const struct cpu_addrcost_table *const addr_cost;
const struct cpu_regmove_cost *const regmove_cost;
const struct cpu_vector_cost *const vec_costs;
@@ -47,6 +47,7 @@
#include "dwarf2.h"
#include "cfgloop.h"
#include "tree-vectorizer.h"
+#include "config/arm/aarch-cost-tables.h"
/* Defined for convenience. */
#define POINTER_BYTES (POINTER_SIZE / BITS_PER_UNIT)
@@ -149,21 +150,6 @@ unsigned long aarch64_tune_flags = 0;
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__
#endif
-static const struct cpu_rtx_cost_table generic_rtx_cost_table =
-{
- NAMED_PARAM (memory_load, COSTS_N_INSNS (1)),
- NAMED_PARAM (memory_store, COSTS_N_INSNS (0)),
- NAMED_PARAM (register_shift, COSTS_N_INSNS (1)),
- NAMED_PARAM (int_divide, COSTS_N_INSNS (6)),
- NAMED_PARAM (float_divide, COSTS_N_INSNS (2)),
- NAMED_PARAM (double_divide, COSTS_N_INSNS (6)),
- NAMED_PARAM (int_multiply, COSTS_N_INSNS (1)),
- NAMED_PARAM (int_multiply_extend, COSTS_N_INSNS (1)),
- NAMED_PARAM (int_multiply_add, COSTS_N_INSNS (1)),
- NAMED_PARAM (int_multiply_extend_add, COSTS_N_INSNS (1)),
- NAMED_PARAM (float_multiply, COSTS_N_INSNS (0)),
- NAMED_PARAM (double_multiply, COSTS_N_INSNS (1))
-};
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__
@@ -216,7 +202,7 @@ __extension__
#endif
static const struct tune_params generic_tunings =
{
- &generic_rtx_cost_table,
+ &generic_extra_costs,
&generic_addrcost_table,
&generic_regmove_cost,
&generic_vector_cost,
@@ -4490,7 +4476,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
int param ATTRIBUTE_UNUSED, int *cost, bool speed)
{
rtx op0, op1;
- const struct cpu_rtx_cost_table *extra_cost
+ const struct cpu_cost_table *extra_cost
= aarch64_tune_params->insn_extra_cost;
switch (code)
@@ -4503,7 +4489,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
{
case MEM:
if (speed)
- *cost += extra_cost->memory_store;
+ *cost += extra_cost->ldst.store;
if (op1 != const0_rtx)
*cost += rtx_cost (op1, SET, 1, speed);
@@ -4540,7 +4526,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
case MEM:
if (speed)
- *cost += extra_cost->memory_load;
+ *cost += extra_cost->ldst.load;
return true;
@@ -4626,7 +4612,8 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
speed)
+ rtx_cost (op1, PLUS, 1, speed));
if (speed)
- *cost += extra_cost->int_multiply_extend_add;
+ *cost +=
+ extra_cost->mult[GET_MODE (x) == DImode].extend_add;
return true;
}
*cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed)
@@ -4634,7 +4621,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ rtx_cost (op1, PLUS, 1, speed));
if (speed)
- *cost += extra_cost->int_multiply_add;
+ *cost += extra_cost->mult[GET_MODE (x) == DImode].add;
}
*cost += (rtx_cost (new_op0, PLUS, 0, speed)
@@ -4700,7 +4687,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
/* Shifting by a register often takes an extra cycle. */
if (speed && !CONST_INT_P (XEXP (x, 1)))
- *cost += extra_cost->register_shift;
+ *cost += extra_cost->alu.arith_shift_reg;
*cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed);
return true;
@@ -4743,19 +4730,19 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
*cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed)
+ rtx_cost (XEXP (op1, 0), MULT, 1, speed));
if (speed)
- *cost += extra_cost->int_multiply_extend;
+ *cost += extra_cost->mult[GET_MODE (x) == DImode].extend;
return true;
}
if (speed)
- *cost += extra_cost->int_multiply;
+ *cost += extra_cost->mult[GET_MODE (x) == DImode].simple;
}
else if (speed)
{
if (GET_MODE (x) == DFmode)
- *cost += extra_cost->double_multiply;
+ *cost += extra_cost->fp[1].mult;
else if (GET_MODE (x) == SFmode)
- *cost += extra_cost->float_multiply;
+ *cost += extra_cost->fp[0].mult;
}
return false; /* All arguments need to be in registers. */
@@ -4766,14 +4753,14 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
if (speed)
{
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
- *cost += (extra_cost->int_multiply_add
- + extra_cost->int_divide);
+ *cost += (extra_cost->mult[GET_MODE (x) == DImode].add
+ + extra_cost->mult[GET_MODE (x) == DImode].idiv);
else if (GET_MODE (x) == DFmode)
- *cost += (extra_cost->double_multiply
- + extra_cost->double_divide);
+ *cost += (extra_cost->fp[1].mult
+ + extra_cost->fp[1].div);
else if (GET_MODE (x) == SFmode)
- *cost += (extra_cost->float_multiply
- + extra_cost->float_divide);
+ *cost += (extra_cost->fp[0].mult
+ + extra_cost->fp[0].div);
}
return false; /* All arguments need to be in registers. */
@@ -4783,11 +4770,11 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
if (speed)
{
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
- *cost += extra_cost->int_divide;
+ *cost += extra_cost->mult[GET_MODE (x) == DImode].idiv;
else if (GET_MODE (x) == DFmode)
- *cost += extra_cost->double_divide;
+ *cost += extra_cost->fp[1].div;
else if (GET_MODE (x) == SFmode)
- *cost += extra_cost->float_divide;
+ *cost += extra_cost->fp[0].div;
}
return false; /* All arguments need to be in registers. */