Patchwork [for-1.8,08/61] target-i386: Remove gen_op_ldu_T0_A0

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Submitter Richard Henderson
Date Nov. 7, 2013, 1:04 a.m.
Message ID <1383786324-18415-9-git-send-email-rth@twiddle.net>
Download mbox | patch
Permalink /patch/289157/
State New
Headers show

Comments

Richard Henderson - Nov. 7, 2013, 1:04 a.m.
Propagate its definition into all users.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-i386/translate.c | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

Patch

diff --git a/target-i386/translate.c b/target-i386/translate.c
index 951931c..4d03d53 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -586,11 +586,6 @@  static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0)
     tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE);
 }
 
-static inline void gen_op_ldu_T0_A0(DisasContext *s, int idx)
-{
-    gen_op_ld_v(s, idx, cpu_T[0], cpu_A0);
-}
-
 static inline void gen_op_ld_T1_A0(DisasContext *s, int idx)
 {
     gen_op_ld_v(s, idx, cpu_T[1], cpu_A0);
@@ -5170,7 +5165,7 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
         case 3: /* lcall Ev */
             gen_op_ld_T1_A0(s, ot);
             gen_add_A0_im(s, 1 << (ot - MO_16 + 1));
-            gen_op_ldu_T0_A0(s, MO_16);
+            gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
         do_lcall:
             if (s->pe && !s->vm86) {
                 gen_update_cc_op(s);
@@ -5196,7 +5191,7 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
         case 5: /* ljmp Ev */
             gen_op_ld_T1_A0(s, ot);
             gen_add_A0_im(s, 1 << (ot - MO_16 + 1));
-            gen_op_ldu_T0_A0(s, MO_16);
+            gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
         do_ljmp:
             if (s->pe && !s->vm86) {
                 gen_update_cc_op(s);
@@ -5709,7 +5704,7 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                 if (b & 8) {
                     gen_op_lds_T0_A0(s, ot);
                 } else {
-                    gen_op_ldu_T0_A0(s, ot);
+                    gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
                 }
                 gen_op_mov_reg_T0(d_ot, reg);
             }
@@ -5788,7 +5783,7 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                 tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
         }
         gen_add_A0_ds_seg(s);
-        gen_op_ldu_T0_A0(s, MO_8);
+        gen_op_ld_v(s, MO_8, cpu_T[0], cpu_A0);
         gen_op_mov_reg_T0(MO_8, R_EAX);
         break;
     case 0xb0 ... 0xb7: /* mov R, Ib */
@@ -5879,7 +5874,7 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
         gen_op_ld_T1_A0(s, ot);
         gen_add_A0_im(s, 1 << (ot - MO_16 + 1));
         /* load the segment first to handle exceptions properly */
-        gen_op_ldu_T0_A0(s, MO_16);
+        gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0);
         gen_movl_seg_T0(s, op, pc_start - s->cs_base);
         /* then put the data */
         gen_op_mov_reg_T1(ot, reg);