From patchwork Wed Nov 6 20:31:44 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 289030 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BBA832C0141 for ; Thu, 7 Nov 2013 08:37:46 +1100 (EST) Received: from localhost ([::1]:35911 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ve9pN-0003Aa-Ic for incoming@patchwork.ozlabs.org; Wed, 06 Nov 2013 15:35:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39263) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ve9mB-0008Dv-KR for qemu-devel@nongnu.org; Wed, 06 Nov 2013 15:32:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ve9m2-0003P0-Ok for qemu-devel@nongnu.org; Wed, 06 Nov 2013 15:32:31 -0500 Received: from mail-vb0-x22b.google.com ([2607:f8b0:400c:c02::22b]:43887) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ve9m2-0003On-Le; Wed, 06 Nov 2013 15:32:22 -0500 Received: by mail-vb0-f43.google.com with SMTP id g10so18548vbg.30 for ; Wed, 06 Nov 2013 12:32:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=frN0A4d3JypsWd1QeFXy3+n3NWTr2+Gt6nV1yCMR/Ak=; b=TYbIc8uml7p/MSEf2exSNroJS+h7i2/03oivVUtAzZTNRIkL7Gz6ieAY9k1Fo3hzba VQyAvZGM1RltpkFoGrZigrjAEwCDLHtu92XUyrGHfizElKaO1YEyDkyhwRKcoaD1xLM0 TnZ/6fJsfoB1Rs3/aIrLJ7PGGOeZd7Gus0lpMME/3CuSFEo3RchgqZIaD4FKw3FGTXu1 frucKx+Py6ijCyZBuuIdocqEDHC2h0KtGMsc6Q7ETBOWWpzfr31Q4ZutygEC+TaAVumg 60FELpNzRGnDBBsFIxAdh53PFBHAteOuGyGuvM4p2DgDVVblq65xPK3LH/gc/LWOFU/V /0TQ== X-Received: by 10.58.67.168 with SMTP id o8mr4038836vet.22.1383769942239; Wed, 06 Nov 2013 12:32:22 -0800 (PST) Received: from tmusta-sc.rchland.ibm.com (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id rx6sm28375094vec.6.2013.11.06.12.32.18 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 06 Nov 2013 12:32:21 -0800 (PST) From: Tom Musta To: qemu-devel@nongnu.org, tommusta@gmail.com Date: Wed, 6 Nov 2013 14:31:44 -0600 Message-Id: <1383769916-5582-3-git-send-email-tommusta@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1383769916-5582-1-git-send-email-tommusta@gmail.com> References: <1383769916-5582-1-git-send-email-tommusta@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400c:c02::22b Cc: qemu-ppc@nongnu.org Subject: [Qemu-devel] [PATCH 02/14] VSX Stage 4: Refactor lxsdx X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch refactors the lxsdx generator. Resuable code is isolated into a macro. The macro will be used in subsequent patches in this series to implement other scalar load instructions. Signed-off-by: Tom Musta --- target-ppc/translate.c | 31 +++++++++++++++++-------------- 1 files changed, 17 insertions(+), 14 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 52d7165..2541b5f 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7006,20 +7006,23 @@ static inline TCGv_i64 cpu_vsrl(int n) } } -static void gen_lxsdx(DisasContext *ctx) -{ - TCGv EA; - if (unlikely(!ctx->vsx_enabled)) { - gen_exception(ctx, POWERPC_EXCP_VSXU); - return; - } - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_reg_index(ctx, EA); - gen_qemu_ld64(ctx, cpu_vsrh(xT(ctx->opcode)), EA); - /* NOTE: cpu_vsrl is undefined */ - tcg_temp_free(EA); -} +#define VSX_LOAD_SCALAR(name, operation) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + TCGv EA; \ + if (unlikely(!ctx->vsx_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VSXU); \ + return; \ + } \ + gen_set_access_type(ctx, ACCESS_INT); \ + EA = tcg_temp_new(); \ + gen_addr_reg_index(ctx, EA); \ + gen_qemu_##operation(ctx, cpu_vsrh(xT(ctx->opcode)), EA); \ + /* NOTE: cpu_vsrl is undefined */ \ + tcg_temp_free(EA); \ +} + +VSX_LOAD_SCALAR(lxsdx, ld64) static void gen_lxvd2x(DisasContext *ctx) {