| Message ID | 1383625260-22294-8-git-send-email-lokeshvutla@ti.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla <lokeshvutla@ti.com> wrote:
> Selecting the Master osc clk as Timer2 clock source.
I obviously missed the first round of patches for AM43xx here. Why is
timer2 being used here? Don't we use the synctimer and timer1 in the kernel?
Regards,
Vaibhav
Hi Vaibhav, On Wednesday 06 November 2013 06:10 PM, Vaibhav Bedia wrote: > On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla <lokeshvutla@ti.com> wrote: >> Selecting the Master osc clk as Timer2 clock source. > > I obviously missed the first round of patches for AM43xx here. Why is > timer2 being used here? Don't we use the synctimer and timer1 in the kernel? In u-boot there is already code present to handle timer2 in arch/arm/cpu/armv7/omap-common/timer.c(Registers offsets are different for timer1 and timer2) . Trying to reuse the same here. This is how it is done in am335x also. Correct me if I am wrong. Thanks and regards, Lokesh > > Regards, > Vaibhav >
Hi Lokesh, On Thu, Nov 7, 2013 at 8:43 AM, Lokesh Vutla <lokeshvutla@ti.com> wrote: > Hi Vaibhav, > On Wednesday 06 November 2013 06:10 PM, Vaibhav Bedia wrote: >> On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla <lokeshvutla@ti.com> wrote: >>> Selecting the Master osc clk as Timer2 clock source. >> >> I obviously missed the first round of patches for AM43xx here. Why is >> timer2 being used here? Don't we use the synctimer and timer1 in the kernel? > In u-boot there is already code present to handle timer2 in > arch/arm/cpu/armv7/omap-common/timer.c(Registers offsets are different for timer1 and timer2) . Trying to reuse the same here. > This is how it is done in am335x also. > Correct me if I am wrong. On AM335x that timer is used in U-Boot in the delay loop and later gets used in the kernel as a system timer. On AM437x it might be a good idea to use synctimer since it has some stabilization period requirements and that's going to affect the kernel boot eventually. Regards, Vaibhav
Hi Vaibhav, On Friday 08 November 2013 02:31 AM, Vaibhav Bedia wrote: > Hi Lokesh, > > On Thu, Nov 7, 2013 at 8:43 AM, Lokesh Vutla <lokeshvutla@ti.com> wrote: >> Hi Vaibhav, >> On Wednesday 06 November 2013 06:10 PM, Vaibhav Bedia wrote: >>> On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla <lokeshvutla@ti.com> wrote: >>>> Selecting the Master osc clk as Timer2 clock source. >>> >>> I obviously missed the first round of patches for AM43xx here. Why is >>> timer2 being used here? Don't we use the synctimer and timer1 in the kernel? >> In u-boot there is already code present to handle timer2 in >> arch/arm/cpu/armv7/omap-common/timer.c(Registers offsets are different for timer1 and timer2) . Trying to reuse the same here. >> This is how it is done in am335x also. >> Correct me if I am wrong. > > On AM335x that timer is used in U-Boot in the delay loop > and later gets used in the kernel as a system timer. On > AM437x it might be a good idea to use synctimer since it > has some stabilization period requirements and that's > going to affect the kernel boot eventually. OK, Correct me if I am wrong. On AM437X also this timer is used in U-Boot in delay loop only. Is there any documentation or any requirement saying that the synctimer needs some stabilization period? (AFAIK and discussed with Sekhar and Afzal, there is no such requirement.) If there is any such requirement for stabilization, then I should not use such timer in delay loop(So use time2 :) ). Should just enable the timer and leave it for stabilization. (There was a special case for RTC clock stabilization and was agreed to enable RTC in U-Boot) Let me know if I am not clear..:) Thanks and regards, Lokesh > > Regards, > Vaibhav >
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index c4890f2..22963b7 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -18,6 +18,7 @@ struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP; +struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL; const struct dpll_regs dpll_mpu_regs = { .cm_clkmode_dpll = CM_WKUP + 0x560, @@ -107,4 +108,7 @@ void enable_basic_clocks(void) }; do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); + + /* Select the Master osc clk as Timer2 clock source */ + writel(0x1, &cmdpll->clktimer2clk); }
Selecting the Master osc clk as Timer2 clock source. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 4 ++++ 1 file changed, 4 insertions(+)