diff mbox

[U-Boot,v2,3/4] arm, at91: add Siemens board taurus and axm

Message ID 1383547247-7017-4-git-send-email-hs@denx.de
State Changes Requested, archived
Delegated to: Andreas Bießmann
Headers show

Commit Message

Heiko Schocher Nov. 4, 2013, 6:40 a.m. UTC
enable support for the siemens AT91SAM9G20 based boards taurus
and axm.

Signed-off-by: Roger Meier <r.meier@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>

---
- changes for v2:
  - add comments from bo shen
    - use gpio api
    - remove unneccessary comment
    - use at91_wait_for_reset()
    - remove unneccessary code in board file
    - Coding Style cleanup (tabs and unneccessary 1 after config define
      removed)
    - add commit message
  - add comments from Andreas Bießmann <andreas.devel@googlemail.com>:
    - detect sdram size on startup without read dram setting
    - get rid of MACH_TYPE definition in config file
---
 board/siemens/taurus/Makefile |  38 +++++++++
 board/siemens/taurus/taurus.c | 186 ++++++++++++++++++++++++++++++++++++++++++
 boards.cfg                    |   2 +
 include/configs/taurus.h      | 159 ++++++++++++++++++++++++++++++++++++
 4 files changed, 385 insertions(+)
 create mode 100644 board/siemens/taurus/Makefile
 create mode 100644 board/siemens/taurus/taurus.c
 create mode 100644 include/configs/taurus.h

Comments

Andreas Bießmann Nov. 4, 2013, 8:43 a.m. UTC | #1
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
> enable support for the siemens AT91SAM9G20 based boards taurus
> and axm.
> 
> Signed-off-by: Roger Meier <r.meier@siemens.com>
> Reviewed-by: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
> Cc: Bo Shen <voice.shen@atmel.com>
> 
> ---
> - changes for v2:
>   - add comments from bo shen
>     - use gpio api
>     - remove unneccessary comment
>     - use at91_wait_for_reset()
>     - remove unneccessary code in board file
>     - Coding Style cleanup (tabs and unneccessary 1 after config define
>       removed)
>     - add commit message
>   - add comments from Andreas Bießmann <andreas.devel@googlemail.com>:
>     - detect sdram size on startup without read dram setting
>     - get rid of MACH_TYPE definition in config file
> ---
>  board/siemens/taurus/Makefile |  38 +++++++++
>  board/siemens/taurus/taurus.c | 186 ++++++++++++++++++++++++++++++++++++++++++
>  boards.cfg                    |   2 +
>  include/configs/taurus.h      | 159 ++++++++++++++++++++++++++++++++++++
>  4 files changed, 385 insertions(+)
>  create mode 100644 board/siemens/taurus/Makefile
>  create mode 100644 board/siemens/taurus/taurus.c
>  create mode 100644 include/configs/taurus.h
> 
> diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile
> new file mode 100644
> index 0000000..9c288b7
> --- /dev/null
> +++ b/board/siemens/taurus/Makefile
> @@ -0,0 +1,38 @@
> +#
> +# Makefile for Siemens TAURUS (AT91SAM9G20) based board
> +# (C) Copyright 2013 Siemens AG
> +#
> +# Based on:
> +# U-Boot file: board/atmel/at91sam9260ek/Makefile
> +#
> +# (C) Copyright 2003-2008
> +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> +#
> +# (C) Copyright 2008
> +# Stelian Pop <stelian@popies.net>
> +# Lead Tech Design <www.leadtechdesign.com>
> +#
> +# SPDX-License-Identifier:	GPL-2.0+
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).o
> +
> +COBJS-y	+= taurus.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS-y))
> +SOBJS	:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
> +	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
> new file mode 100644
> index 0000000..66d55d6
> --- /dev/null
> +++ b/board/siemens/taurus/taurus.c
> @@ -0,0 +1,186 @@
> +/*
> + * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
> + * (C) Copyright Siemens AG
> + *
> + * Based on:
> + * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
> + *
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/at91sam9260_matrix.h>
> +#include <asm/arch/at91sam9_smc.h>
> +#include <asm/arch/at91_common.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_rstc.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/arch/at91sam9_sdramc.h>
> +#include <atmel_mci.h>
> +
> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)

minor complaint: I think we can include net.h unconditionally here.

> +# include <net.h>
> +#endif
> +#include <netdev.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#ifdef CONFIG_CMD_NAND
> +static void taurus_nand_hw_init(void)
> +{
> +	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> +	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> +	unsigned long csa;
> +
> +	/* Assign CS3 to NAND/SmartMedia Interface */
> +	csa = readl(&matrix->ebicsa);
> +	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
> +	writel(csa, &matrix->ebicsa);
> +
> +	/* Configure SMC CS3 for NAND/SmartMedia */
> +	writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
> +	       AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
> +	       &smc->cs[3].setup);
> +	writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
> +	       AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
> +	       &smc->cs[3].pulse);
> +	writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
> +	       &smc->cs[3].cycle);
> +	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> +	       AT91_SMC_MODE_EXNW_DISABLE |
> +	       AT91_SMC_MODE_DBW_8 |
> +	       AT91_SMC_MODE_TDF_CYCLE(3),
> +	       &smc->cs[3].mode);
> +
> +	/* Configure RDY/BSY */
> +	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +
> +	/* Enable NandFlash */
> +	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +}
> +#endif
> +
> +#ifdef CONFIG_MACB
> +static void taurus_macb_hw_init(void)
> +{
> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
> +	unsigned long erstl;
> +
> +	/* Enable EMAC clock */
> +	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);

Is it required to enable the MACB clock before PHY reset? It will be
done later on in at91_macb_hw_init() in any case.

> +
> +	/*
> +	 * Disable pull-up on:
> +	 *	RXDV (PA17) => PHY normal mode (not Test mode)
> +	 *	ERX0 (PA14) => PHY ADDR0
> +	 *	ERX1 (PA15) => PHY ADDR1
> +	 *	ERX2 (PA25) => PHY ADDR2
> +	 *	ERX3 (PA26) => PHY ADDR3
> +	 *	ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
> +	 *
> +	 * PHY has internal pull-down
> +	 */
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);

I'm a bit unhappy with this.
As sayed before I'd like to switch the 'ATMEL_LEGACY' PIO API to be the
new one. Would it be Ok for you to wait a few days for me to prepare the
API for all pio features to be able to feed with a single pin input?

Beside that I said to provide some PIO API with PORT + MASK input. I
still think that would be useful but I do not plan to work on that for
this release. I'd be happy if you could do that, but changing it later
is also Ok for me.

> +
> +	/*
> +	 * Need to reset PHY ?-> 200us reset
> +	 * Bug within Atmel CPU (undefined initial states on io-lines)!
> +	 * Startup Ethernet Switch delayed so that hardstrap(Switch Config)
> +	 * has defined state after cold start (do not break daisy chain!).
> +	 */
> +	if ((readl(&rstc->sr) & AT91_RSTC_RSTTYP) == AT91_RSTC_RSTTYP_GENERAL)
> +		at91_set_gpio_output(AT91_PIN_PA25, 0);
> +
> +

One empty line could be left out.

> +	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
> +
> +	/* Need to reset PHY -> 500ms reset */
> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
> +		AT91_RSTC_MR_URSTEN, &rstc->mr);
> +
> +	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
> +
> +	/* Wait for end of reset */
> +	at91_wait_for_reset(100);
> +
> +	/* Restore NRST value */
> +	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
> +
> +	at91_set_gpio_input(AT91_PIN_PA25, 1);   /* ERST tri-state */
> +
> +	/* Re-enable pull-up */
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
> +	at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
> +
> +	/* Initialize EMAC=MACB hardware */
> +	at91_macb_hw_init();
> +}
> +#endif
> +
> +#ifdef CONFIG_GENERIC_ATMEL_MCI
> +int board_mmc_init(bd_t *bd)
> +{
> +	at91_mci_hw_init();
> +
> +	return atmel_mci_init((void *)ATMEL_BASE_MCI);
> +}
> +#endif
> +
> +int board_early_init_f(void)
> +{
> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> +	/* Enable clocks for all PIOs */
> +	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
> +		(1 << ATMEL_ID_PIOC),
> +		&pmc->pcer);
> +
> +	return 0;
> +}
> +
> +int board_init(void)
> +{
> +	/* adress of boot parameters */
> +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> +
> +	at91_seriald_hw_init();

I think enabling debug output in early_init is more useful than here.

> +#ifdef CONFIG_CMD_NAND
> +	taurus_nand_hw_init();
> +#endif
> +#ifdef CONFIG_MACB
> +	taurus_macb_hw_init();
> +#endif
> +
> +	return 0;
> +}
> +
> +int dram_init(void)
> +{
> +	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
> +				    CONFIG_SYS_SDRAM_SIZE);
> +	return 0;
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> +	int rc = 0;
> +#ifdef CONFIG_MACB
> +	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
> +#endif
> +	return rc;
> +}
> diff --git a/boards.cfg b/boards.cfg
> index aa2ee64..0fe98d0 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -139,6 +139,8 @@ Active  arm         arm926ejs      at91        ronetix         pm9263
>  Active  arm         arm926ejs      at91        ronetix         pm9g45              pm9g45                               pm9g45:AT91SAM9G45                                                                                                                Ilko Iliev <iliev@ronetix.at>
>  Active  arm         arm926ejs      at91        taskit          stamp9g20           portuxg20                            stamp9g20:AT91SAM9G20,PORTUXG20                                                                                                   Markus Hubig <mhubig@imko.de>
>  Active  arm         arm926ejs      at91        taskit          stamp9g20           stamp9g20                            stamp9g20:AT91SAM9G20                                                                                                             Markus Hubig <mhubig@imko.de>
> +Active  arm         arm926ejs      at91        siemens         taurus              axm                                  taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM                                                                                       Heiko Schocher <hs@denx.de>
> +Active  arm         arm926ejs      at91        siemens         taurus              taurus                               taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS                                                                                    Heiko Schocher <hs@denx.de>
>  Active  arm         arm926ejs      davinci     ait             cam_enc_4xx         cam_enc_4xx                          cam_enc_4xx                                                                                                                       Heiko Schocher <hs@denx.de>
>  Active  arm         arm926ejs      davinci     Barix           ipam390             ipam390                              -                                                                                                                                 Heiko Schocher <hs@denx.de>
>  Active  arm         arm926ejs      davinci     davinci         da8xxevm            da830evm                             -                                                                                                                                 Nick Thompson <nick.thompson@gefanuc.com>
> diff --git a/include/configs/taurus.h b/include/configs/taurus.h
> new file mode 100644
> index 0000000..26255bb
> --- /dev/null
> +++ b/include/configs/taurus.h
> @@ -0,0 +1,159 @@
> +/*
> + * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
> + * (C) Copyright 2013 Siemens AG
> + *
> + * Based on:
> + * U-Boot file: include/configs/at91sam9260ek.h
> + *
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian@popies.net>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * SoC must be defined first, before hardware.h is included.
> + * In this case SoC is defined in boards.cfg.
> + */
> +#include <asm/hardware.h>
> +
> +#define MACH_TYPE_TAURUS		2067
> +#define MACH_TYPE_AXM			2068
> +
> +/*
> + * Warning: changing CONFIG_SYS_TEXT_BASE requires
> + * adapting the initial boot program.
> + * Since the linker has to swallow that define, we must use a pure
> + * hex number here!
> + */
> +
> +
> +#define CONFIG_SYS_TEXT_BASE		0x23f00000
> +
> +/* ARM asynchronous clock */
> +#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
> +#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
> +#define CONFIG_SYS_HZ			1000
> +
> +/* Misc CPU related */
> +#define CONFIG_ARCH_CPU_INIT
> +#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_DISPLAY_CPUINFO
> +
> +#define CONFIG_CMD_BOOTZ
> +#define CONFIG_OF_LIBFDT
> +
> +/* general purpose I/O */
> +#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
> +#define CONFIG_AT91_GPIO
> +#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
> +
> +/* serial console */
> +#define CONFIG_ATMEL_USART
> +#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
> +#define CONFIG_USART_ID			ATMEL_ID_SYS
> +#define CONFIG_BAUDRATE			115200
> +
> +#define CONFIG_BOOTDELAY	3
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_SOURCE
> +
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_NAND
> +
> +/*
> + * SDRAM: 1 bank, min 32, max 128 MB
> + * Initialized before u-boot gets started.
> + */
> +#define CONFIG_NR_DRAM_BANKS		1
> +#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
> +#define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024)
> +
> +/*
> + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
> + * leaving the correct space for initial global data structure above
> + * that address while providing maximum stack area below.
> + */
> +# define CONFIG_SYS_INIT_SP_ADDR \
> +	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
> +
> +/* NAND flash */
> +#ifdef CONFIG_CMD_NAND
> +#define CONFIG_NAND_ATMEL
> +#define CONFIG_SYS_MAX_NAND_DEVICE	1
> +#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
> +#define CONFIG_SYS_NAND_DBW_8
> +#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
> +#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
> +#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
> +#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
> +#endif
> +
> +/* NOR flash - no real flash on this board */
> +#define CONFIG_SYS_NO_FLASH			1
> +
> +/* Ethernet */
> +#define CONFIG_MACB
> +#define CONFIG_RMII
> +
> +/* USB */
> +#if defined(CONFIG_BOARD_TAURUS)
> +#define CONFIG_USB_ATMEL
> +#define CONFIG_USB_OHCI_NEW
> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
> +#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2LEGA

What does '2LEGA' mean here?

> +#define CONFIG_USB_STORAGE
> +#endif
> +
> +/* load address */
> +#define CONFIG_SYS_LOAD_ADDR			0x22000000
> +
> +/* bootstrap in spi flash , u-boot + env + linux in nandflash */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET		0x100000
> +#define CONFIG_ENV_OFFSET_REDUND	0x180000
> +#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
> +#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
> +#define CONFIG_BOOTARGS							\
> +	"console=ttyS0,115200 earlyprintk "				\
> +	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
> +	"256k(env),256k(env_redundant),256k(spare),"			\
> +	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
> +	"root=/dev/mtdblock7 rw rootfstype=jffs2"
> +
> +#define CONFIG_SYS_PROMPT		"U-Boot> "
> +#define CONFIG_SYS_CBSIZE		256
> +#define CONFIG_SYS_MAXARGS		16
> +#define CONFIG_SYS_PBSIZE \
> +	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_AUTO_COMPLETE
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN \
> +	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
> +
> +#endif
> 

Best regards

Andreas Bießmann
Heiko Schocher Nov. 4, 2013, 9:09 a.m. UTC | #2
Hello Andreas,

Am 04.11.2013 09:43, schrieb Andreas Bießmann:
> On 11/04/2013 07:40 AM, Heiko Schocher wrote:
>> enable support for the siemens AT91SAM9G20 based boards taurus
>> and axm.
>>
>> Signed-off-by: Roger Meier<r.meier@siemens.com>
>> Reviewed-by: Heiko Schocher<hs@denx.de>
>> Cc: Andreas Bießmann<andreas.devel@googlemail.com>
>> Cc: Bo Shen<voice.shen@atmel.com>
>>
>> ---
>> - changes for v2:
>>    - add comments from bo shen
>>      - use gpio api
>>      - remove unneccessary comment
>>      - use at91_wait_for_reset()
>>      - remove unneccessary code in board file
>>      - Coding Style cleanup (tabs and unneccessary 1 after config define
>>        removed)
>>      - add commit message
>>    - add comments from Andreas Bießmann<andreas.devel@googlemail.com>:
>>      - detect sdram size on startup without read dram setting
>>      - get rid of MACH_TYPE definition in config file
>> ---
>>   board/siemens/taurus/Makefile |  38 +++++++++
>>   board/siemens/taurus/taurus.c | 186 ++++++++++++++++++++++++++++++++++++++++++
>>   boards.cfg                    |   2 +
>>   include/configs/taurus.h      | 159 ++++++++++++++++++++++++++++++++++++
>>   4 files changed, 385 insertions(+)
>>   create mode 100644 board/siemens/taurus/Makefile
>>   create mode 100644 board/siemens/taurus/taurus.c
>>   create mode 100644 include/configs/taurus.h
>>
>> diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile
>> new file mode 100644
>> index 0000000..9c288b7
>> --- /dev/null
>> +++ b/board/siemens/taurus/Makefile
[...]
>> diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
>> new file mode 100644
>> index 0000000..66d55d6
>> --- /dev/null
>> +++ b/board/siemens/taurus/taurus.c
>> @@ -0,0 +1,186 @@
>> +/*
>> + * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
>> + * (C) Copyright Siemens AG
>> + *
>> + * Based on:
>> + * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
>> + *
>> + * (C) Copyright 2007-2008
>> + * Stelian Pop<stelian@popies.net>
>> + * Lead Tech Design<www.leadtechdesign.com>
>> + *
>> + * SPDX-License-Identifier:	GPL-2.0+
>> + */
>> +
>> +#include<common.h>
>> +#include<asm/io.h>
>> +#include<asm/arch/at91sam9260_matrix.h>
>> +#include<asm/arch/at91sam9_smc.h>
>> +#include<asm/arch/at91_common.h>
>> +#include<asm/arch/at91_pmc.h>
>> +#include<asm/arch/at91_rstc.h>
>> +#include<asm/arch/gpio.h>
>> +#include<asm/arch/at91sam9_sdramc.h>
>> +#include<atmel_mci.h>
>> +
>> +#if defined(CONFIG_RESET_PHY_R)&&  defined(CONFIG_MACB)
>
> minor complaint: I think we can include net.h unconditionally here.

removed.

>> +# include<net.h>
>> +#endif
>> +#include<netdev.h>
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +#ifdef CONFIG_CMD_NAND
>> +static void taurus_nand_hw_init(void)
>> +{
>> +	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
>> +	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
>> +	unsigned long csa;
>> +
>> +	/* Assign CS3 to NAND/SmartMedia Interface */
>> +	csa = readl(&matrix->ebicsa);
>> +	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
>> +	writel(csa,&matrix->ebicsa);
>> +
>> +	/* Configure SMC CS3 for NAND/SmartMedia */
>> +	writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
>> +	       AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
>> +	&smc->cs[3].setup);
>> +	writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
>> +	       AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
>> +	&smc->cs[3].pulse);
>> +	writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
>> +	&smc->cs[3].cycle);
>> +	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
>> +	       AT91_SMC_MODE_EXNW_DISABLE |
>> +	       AT91_SMC_MODE_DBW_8 |
>> +	       AT91_SMC_MODE_TDF_CYCLE(3),
>> +	&smc->cs[3].mode);
>> +
>> +	/* Configure RDY/BSY */
>> +	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
>> +
>> +	/* Enable NandFlash */
>> +	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
>> +}
>> +#endif
>> +
>> +#ifdef CONFIG_MACB
>> +static void taurus_macb_hw_init(void)
>> +{
>> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>> +	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>> +	unsigned long erstl;
>> +
>> +	/* Enable EMAC clock */
>> +	writel(1<<  ATMEL_ID_EMAC0,&pmc->pcer);
>
> Is it required to enable the MACB clock before PHY reset? It will be
> done later on in at91_macb_hw_init() in any case.

Hmm.. this is done in more at91 boards ... Hmm.. seems we should
look, if we can make this function common? If I see this correct,
only the pin setup is board specific, or?

>> +
>> +	/*
>> +	 * Disable pull-up on:
>> +	 *	RXDV (PA17) =>  PHY normal mode (not Test mode)
>> +	 *	ERX0 (PA14) =>  PHY ADDR0
>> +	 *	ERX1 (PA15) =>  PHY ADDR1
>> +	 *	ERX2 (PA25) =>  PHY ADDR2
>> +	 *	ERX3 (PA26) =>  PHY ADDR3
>> +	 *	ECRS (PA28) =>  PHY ADDR4  =>  PHYADDR = 0x0
>> +	 *
>> +	 * PHY has internal pull-down
>> +	 */
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
>
> I'm a bit unhappy with this.
> As sayed before I'd like to switch the 'ATMEL_LEGACY' PIO API to be the
> new one. Would it be Ok for you to wait a few days for me to prepare the
> API for all pio features to be able to feed with a single pin input?

Ok for me. You can send me your patches, so I can test them?

> Beside that I said to provide some PIO API with PORT + MASK input. I
> still think that would be useful but I do not plan to work on that for
> this release. I'd be happy if you could do that, but changing it later
> is also Ok for me.
>
>> +
>> +	/*
>> +	 * Need to reset PHY ?->  200us reset
>> +	 * Bug within Atmel CPU (undefined initial states on io-lines)!
>> +	 * Startup Ethernet Switch delayed so that hardstrap(Switch Config)
>> +	 * has defined state after cold start (do not break daisy chain!).
>> +	 */
>> +	if ((readl(&rstc->sr)&  AT91_RSTC_RSTTYP) == AT91_RSTC_RSTTYP_GENERAL)
>> +		at91_set_gpio_output(AT91_PIN_PA25, 0);
>> +
>> +
>
> One empty line could be left out.

removed.

>> +	erstl = readl(&rstc->mr)&  AT91_RSTC_MR_ERSTL_MASK;
>> +
>> +	/* Need to reset PHY ->  500ms reset */
>> +	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>> +		AT91_RSTC_MR_URSTEN,&rstc->mr);
>> +
>> +	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
>> +
>> +	/* Wait for end of reset */
>> +	at91_wait_for_reset(100);
>> +
>> +	/* Restore NRST value */
>> +	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,&rstc->mr);
>> +
>> +	at91_set_gpio_input(AT91_PIN_PA25, 1);   /* ERST tri-state */
>> +
>> +	/* Re-enable pull-up */
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
>> +	at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
>> +
>> +	/* Initialize EMAC=MACB hardware */
>> +	at91_macb_hw_init();
>> +}
>> +#endif
[...]
>> +int board_init(void)
>> +{
>> +	/* adress of boot parameters */
>> +	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>> +
>> +	at91_seriald_hw_init();
>
> I think enabling debug output in early_init is more useful than here.

moved.

[...]
>> diff --git a/include/configs/taurus.h b/include/configs/taurus.h
>> new file mode 100644
>> index 0000000..26255bb
>> --- /dev/null
>> +++ b/include/configs/taurus.h
>> @@ -0,0 +1,159 @@
>> +/*
>> + * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
>> + * (C) Copyright 2013 Siemens AG
>> + *
>> + * Based on:
>> + * U-Boot file: include/configs/at91sam9260ek.h
>> + *
>> + * (C) Copyright 2007-2008
>> + * Stelian Pop<stelian@popies.net>
>> + * Lead Tech Design<www.leadtechdesign.com>
>> + *
>> + * SPDX-License-Identifier:	GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_H
>> +#define __CONFIG_H
>> +
>> +/*
>> + * SoC must be defined first, before hardware.h is included.
>> + * In this case SoC is defined in boards.cfg.
>> + */
>> +#include<asm/hardware.h>
>> +
>> +#define MACH_TYPE_TAURUS		2067
>> +#define MACH_TYPE_AXM			2068
>> +
>> +/*
>> + * Warning: changing CONFIG_SYS_TEXT_BASE requires
>> + * adapting the initial boot program.
>> + * Since the linker has to swallow that define, we must use a pure
>> + * hex number here!
>> + */
>> +
>> +
>> +#define CONFIG_SYS_TEXT_BASE		0x23f00000
>> +
>> +/* ARM asynchronous clock */
>> +#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
>> +#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
>> +#define CONFIG_SYS_HZ			1000
>> +
>> +/* Misc CPU related */
>> +#define CONFIG_ARCH_CPU_INIT
>> +#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
>> +#define CONFIG_SETUP_MEMORY_TAGS
>> +#define CONFIG_INITRD_TAG
>> +#define CONFIG_SKIP_LOWLEVEL_INIT
>> +#define CONFIG_BOARD_EARLY_INIT_F
>> +#define CONFIG_DISPLAY_CPUINFO
>> +
>> +#define CONFIG_CMD_BOOTZ
>> +#define CONFIG_OF_LIBFDT
>> +
>> +/* general purpose I/O */
>> +#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
>> +#define CONFIG_AT91_GPIO
>> +#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
>> +
>> +/* serial console */
>> +#define CONFIG_ATMEL_USART
>> +#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
>> +#define CONFIG_USART_ID			ATMEL_ID_SYS
>> +#define CONFIG_BAUDRATE			115200
>> +
>> +#define CONFIG_BOOTDELAY	3
>> +
>> +/*
>> + * Command line configuration.
>> + */
>> +#include<config_cmd_default.h>
>> +#undef CONFIG_CMD_BDI
>> +#undef CONFIG_CMD_FPGA
>> +#undef CONFIG_CMD_IMI
>> +#undef CONFIG_CMD_IMLS
>> +#undef CONFIG_CMD_LOADS
>> +#undef CONFIG_CMD_SOURCE
>> +
>> +#define CONFIG_CMD_PING
>> +#define CONFIG_CMD_DHCP
>> +#define CONFIG_CMD_NAND
>> +
>> +/*
>> + * SDRAM: 1 bank, min 32, max 128 MB
>> + * Initialized before u-boot gets started.
>> + */
>> +#define CONFIG_NR_DRAM_BANKS		1
>> +#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
>> +#define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024)
>> +
>> +/*
>> + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
>> + * leaving the correct space for initial global data structure above
>> + * that address while providing maximum stack area below.
>> + */
>> +# define CONFIG_SYS_INIT_SP_ADDR \
>> +	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
>> +
>> +/* NAND flash */
>> +#ifdef CONFIG_CMD_NAND
>> +#define CONFIG_NAND_ATMEL
>> +#define CONFIG_SYS_MAX_NAND_DEVICE	1
>> +#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
>> +#define CONFIG_SYS_NAND_DBW_8
>> +#define CONFIG_SYS_NAND_MASK_ALE	(1<<  21)
>> +#define CONFIG_SYS_NAND_MASK_CLE	(1<<  22)
>> +#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
>> +#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
>> +#endif
>> +
>> +/* NOR flash - no real flash on this board */
>> +#define CONFIG_SYS_NO_FLASH			1
>> +
>> +/* Ethernet */
>> +#define CONFIG_MACB
>> +#define CONFIG_RMII
>> +
>> +/* USB */
>> +#if defined(CONFIG_BOARD_TAURUS)
>> +#define CONFIG_USB_ATMEL
>> +#define CONFIG_USB_OHCI_NEW
>> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
>> +#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
>> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
>> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2LEGA
>
> What does '2LEGA' mean here?

Hups... This should be:

#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2

Hmm... I do not find this in my patch file I send with git-sendmail

Also in the mailarchive:
http://lists.denx.de/pipermail/u-boot/2013-November/166040.html

I could not find "2LEGA" ...

But in Patchwork, there is a "2LEGA" ...

http://patchwork.ozlabs.org/patch/288117/

It seems, thats something introduced from you?

>> +#define CONFIG_USB_STORAGE
>> +#endif
>> +
>> +/* load address */
>> +#define CONFIG_SYS_LOAD_ADDR			0x22000000
>> +
>> +/* bootstrap in spi flash , u-boot + env + linux in nandflash */
>> +#define CONFIG_ENV_IS_IN_NAND
>> +#define CONFIG_ENV_OFFSET		0x100000
>> +#define CONFIG_ENV_OFFSET_REDUND	0x180000
>> +#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
>> +#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
>> +#define CONFIG_BOOTARGS							\
>> +	"console=ttyS0,115200 earlyprintk "				\
>> +	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
>> +	"256k(env),256k(env_redundant),256k(spare),"			\
>> +	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
>> +	"root=/dev/mtdblock7 rw rootfstype=jffs2"
>> +
>> +#define CONFIG_SYS_PROMPT		"U-Boot>  "
>> +#define CONFIG_SYS_CBSIZE		256
>> +#define CONFIG_SYS_MAXARGS		16
>> +#define CONFIG_SYS_PBSIZE \
>> +	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
>> +#define CONFIG_SYS_LONGHELP
>> +#define CONFIG_CMDLINE_EDITING
>> +#define CONFIG_AUTO_COMPLETE
>> +
>> +/*
>> + * Size of malloc() pool
>> + */
>> +#define CONFIG_SYS_MALLOC_LEN \
>> +	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
>> +
>> +#endif

bye,
Heiko
Andreas Bießmann Nov. 4, 2013, 11:04 a.m. UTC | #3
Hello Heiko,

On 11/04/2013 10:09 AM, Heiko Schocher wrote:
> Am 04.11.2013 09:43, schrieb Andreas Bießmann:
>> On 11/04/2013 07:40 AM, Heiko Schocher wrote:

<snip>

>>> +#ifdef CONFIG_MACB
>>> +static void taurus_macb_hw_init(void)
>>> +{
>>> +    struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>>> +    struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>>> +    unsigned long erstl;
>>> +
>>> +    /* Enable EMAC clock */
>>> +    writel(1<<  ATMEL_ID_EMAC0,&pmc->pcer);
>>
>> Is it required to enable the MACB clock before PHY reset? It will be
>> done later on in at91_macb_hw_init() in any case.
> 
> Hmm.. this is done in more at91 boards ... Hmm.. seems we should
> look, if we can make this function common? If I see this correct,
> only the pin setup is board specific, or?

That's true.

How could we provide the gpio setup to a common function then?

I think we should go with some at91_phy_reset() which should preferably
run before enabling the (e)macb (would that be true for
CONFIG_RESET_PHY_R?).
I haven't checked it but think it would be Ok to enable the (e)macb
peripheral clock when enabling the peripheral. Therefore the 'Enable
EMAC clock' above could be removed. _All_ at91_macb_hw_init() should
therefore enable the peripheral clock ... unfortunately some do not at
the moment.

<snip>

>>> +/* USB */
>>> +#if defined(CONFIG_BOARD_TAURUS)
>>> +#define CONFIG_USB_ATMEL
>>> +#define CONFIG_USB_OHCI_NEW
>>> +#define CONFIG_SYS_USB_OHCI_CPU_INIT
>>> +#define CONFIG_SYS_USB_OHCI_REGS_BASE        0x00500000
>>> +#define CONFIG_SYS_USB_OHCI_SLOT_NAME        "at91sam9260"
>>> +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS    2LEGA
>>
>> What does '2LEGA' mean here?
> 
> Hups... This should be:
> 
> #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS    2
> 
> Hmm... I do not find this in my patch file I send with git-sendmail
> 
> Also in the mailarchive:
> http://lists.denx.de/pipermail/u-boot/2013-November/166040.html
> 
> I could not find "2LEGA" ...
> 
> But in Patchwork, there is a "2LEGA" ...
> 
> http://patchwork.ozlabs.org/patch/288117/

I can't find it in the patch ...

> 
> It seems, thats something introduced from you?

Yea, maybe some cursor jump around in MUA while writing 'ATMEL_LEGACY'.
Sorry for the trouble.

Best regards

Andreas Bießmann
diff mbox

Patch

diff --git a/board/siemens/taurus/Makefile b/board/siemens/taurus/Makefile
new file mode 100644
index 0000000..9c288b7
--- /dev/null
+++ b/board/siemens/taurus/Makefile
@@ -0,0 +1,38 @@ 
+#
+# Makefile for Siemens TAURUS (AT91SAM9G20) based board
+# (C) Copyright 2013 Siemens AG
+#
+# Based on:
+# U-Boot file: board/atmel/at91sam9260ek/Makefile
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian@popies.net>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS-y	+= taurus.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
new file mode 100644
index 0000000..66d55d6
--- /dev/null
+++ b/board/siemens/taurus/taurus.c
@@ -0,0 +1,186 @@ 
+/*
+ * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
+ * (C) Copyright Siemens AG
+ *
+ * Based on:
+ * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91sam9_sdramc.h>
+#include <atmel_mci.h>
+
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+# include <net.h>
+#endif
+#include <netdev.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_NAND
+static void taurus_nand_hw_init(void)
+{
+	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	unsigned long csa;
+
+	/* Assign CS3 to NAND/SmartMedia Interface */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+	writel(csa, &matrix->ebicsa);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+	       AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+	       &smc->cs[3].setup);
+	writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
+	       AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
+	       &smc->cs[3].pulse);
+	writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
+	       &smc->cs[3].cycle);
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+	       AT91_SMC_MODE_EXNW_DISABLE |
+	       AT91_SMC_MODE_DBW_8 |
+	       AT91_SMC_MODE_TDF_CYCLE(3),
+	       &smc->cs[3].mode);
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void taurus_macb_hw_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
+	unsigned long erstl;
+
+	/* Enable EMAC clock */
+	writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
+
+	/*
+	 * Disable pull-up on:
+	 *	RXDV (PA17) => PHY normal mode (not Test mode)
+	 *	ERX0 (PA14) => PHY ADDR0
+	 *	ERX1 (PA15) => PHY ADDR1
+	 *	ERX2 (PA25) => PHY ADDR2
+	 *	ERX3 (PA26) => PHY ADDR3
+	 *	ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
+	 *
+	 * PHY has internal pull-down
+	 */
+	at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
+
+	/*
+	 * Need to reset PHY ?-> 200us reset
+	 * Bug within Atmel CPU (undefined initial states on io-lines)!
+	 * Startup Ethernet Switch delayed so that hardstrap(Switch Config)
+	 * has defined state after cold start (do not break daisy chain!).
+	 */
+	if ((readl(&rstc->sr) & AT91_RSTC_RSTTYP) == AT91_RSTC_RSTTYP_GENERAL)
+		at91_set_gpio_output(AT91_PIN_PA25, 0);
+
+
+	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
+
+	/* Need to reset PHY -> 500ms reset */
+	writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
+		AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+	writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
+
+	/* Wait for end of reset */
+	at91_wait_for_reset(100);
+
+	/* Restore NRST value */
+	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
+
+	at91_set_gpio_input(AT91_PIN_PA25, 1);   /* ERST tri-state */
+
+	/* Re-enable pull-up */
+	at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
+	at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
+
+	/* Initialize EMAC=MACB hardware */
+	at91_macb_hw_init();
+}
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+int board_mmc_init(bd_t *bd)
+{
+	at91_mci_hw_init();
+
+	return atmel_mci_init((void *)ATMEL_BASE_MCI);
+}
+#endif
+
+int board_early_init_f(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	/* Enable clocks for all PIOs */
+	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+		(1 << ATMEL_ID_PIOC),
+		&pmc->pcer);
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	at91_seriald_hw_init();
+#ifdef CONFIG_CMD_NAND
+	taurus_nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	taurus_macb_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
+#endif
+	return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index aa2ee64..0fe98d0 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -139,6 +139,8 @@  Active  arm         arm926ejs      at91        ronetix         pm9263
 Active  arm         arm926ejs      at91        ronetix         pm9g45              pm9g45                               pm9g45:AT91SAM9G45                                                                                                                Ilko Iliev <iliev@ronetix.at>
 Active  arm         arm926ejs      at91        taskit          stamp9g20           portuxg20                            stamp9g20:AT91SAM9G20,PORTUXG20                                                                                                   Markus Hubig <mhubig@imko.de>
 Active  arm         arm926ejs      at91        taskit          stamp9g20           stamp9g20                            stamp9g20:AT91SAM9G20                                                                                                             Markus Hubig <mhubig@imko.de>
+Active  arm         arm926ejs      at91        siemens         taurus              axm                                  taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM                                                                                       Heiko Schocher <hs@denx.de>
+Active  arm         arm926ejs      at91        siemens         taurus              taurus                               taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS                                                                                    Heiko Schocher <hs@denx.de>
 Active  arm         arm926ejs      davinci     ait             cam_enc_4xx         cam_enc_4xx                          cam_enc_4xx                                                                                                                       Heiko Schocher <hs@denx.de>
 Active  arm         arm926ejs      davinci     Barix           ipam390             ipam390                              -                                                                                                                                 Heiko Schocher <hs@denx.de>
 Active  arm         arm926ejs      davinci     davinci         da8xxevm            da830evm                             -                                                                                                                                 Nick Thompson <nick.thompson@gefanuc.com>
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
new file mode 100644
index 0000000..26255bb
--- /dev/null
+++ b/include/configs/taurus.h
@@ -0,0 +1,159 @@ 
+/*
+ * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
+ * (C) Copyright 2013 Siemens AG
+ *
+ * Based on:
+ * U-Boot file: include/configs/at91sam9260ek.h
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+#define MACH_TYPE_TAURUS		2067
+#define MACH_TYPE_AXM			2068
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+
+
+#define CONFIG_SYS_TEXT_BASE		0x23f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
+#define CONFIG_SYS_HZ			1000
+
+/* Misc CPU related */
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+
+#define CONFIG_BOOTDELAY	3
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_SOURCE
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024)
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+# define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
+/* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
+#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
+#endif
+
+/* NOR flash - no real flash on this board */
+#define CONFIG_SYS_NO_FLASH			1
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_RMII
+
+/* USB */
+#if defined(CONFIG_BOARD_TAURUS)
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+#define CONFIG_USB_STORAGE
+#endif
+
+/* load address */
+#define CONFIG_SYS_LOAD_ADDR			0x22000000
+
+/* bootstrap in spi flash , u-boot + env + linux in nandflash */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET		0x100000
+#define CONFIG_ENV_OFFSET_REDUND	0x180000
+#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
+#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
+#define CONFIG_BOOTARGS							\
+	"console=ttyS0,115200 earlyprintk "				\
+	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
+	"256k(env),256k(env_redundant),256k(spare),"			\
+	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
+	"root=/dev/mtdblock7 rw rootfstype=jffs2"
+
+#define CONFIG_SYS_PROMPT		"U-Boot> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_PBSIZE \
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN \
+	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+
+#endif