Patchwork [i386] : Introduce Ts and Tv address constraints

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Submitter Uros Bizjak
Date Nov. 2, 2013, 11:36 a.m.
Message ID <CAFULd4b2ZZ2MchQwvmbPAiQKwz0T9h4LiZ3=+1anF0tc3ng4hw@mail.gmail.com>
Download mbox | patch
Permalink /patch/287974/
State New
Headers show

Comments

Uros Bizjak - Nov. 2, 2013, 11:36 a.m.
Hello!

These two constraints go together with address_no_seg_operand and
vsib_address_operand operand predicates.

2013-11-02  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/constraints.md (Ts, Tv): New address constrains.
    * config/i386/i386.md (*lea<mode>, *<mode>_<bndcheck>): Use Ts
    constraint for address_no_seg_operand.
    * config/i386/sse.md (*avx512pf_gatherpf<mode>_mask)
    (*avx512pf_gatherpf<mode>, *avx512pf_scatterpf<mode>_mask)
    (*avx512pf_scatterpf<mode>, *avx2_gathersi<mode>)
    (*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>_2)
    (*avx2_gatherdi<mode>_3, *avx2_gatherdi<mode>_4)
    (*avx512f_gathersi<mode>, *avx512f_gathersi<mode>_2)
    (*avx512f_gatherdi<mode>, *avx512f_gatherdi<mode>_2)
    (*avx512f_scattersi<mode> *avx512f_scatterdi<mode>): Use Tv
    constraint for vsib_address_operand.

Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32} and
committed to mainline SVN.

Uros.

Patch

Index: config/i386/constraints.md
===================================================================
--- config/i386/constraints.md	(revision 204298)
+++ config/i386/constraints.md	(working copy)
@@ -237,9 +237,19 @@ 
   (match_operand 0 "x86_64_zext_immediate_operand"))
 
 ;; T prefix is used for different address constraints
+;;   v - VSIB address
+;;   s - address with no segment register
 ;;   i - address with no index and no rip
 ;;   b - address with no base and no rip
 
+(define_address_constraint "Tv"
+  "VSIB address operand"
+  (match_operand 0 "vsib_address_operand"))
+
+(define_address_constraint "Ts"
+  "Address operand without segment register"
+  (match_operand 0 "address_no_seg_operand"))
+
 (define_address_constraint "Ti"
   "MPX address operand without index"
   (match_operand 0 "address_mpx_no_index_operand"))
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 204298)
+++ config/i386/i386.md	(working copy)
@@ -5394,7 +5394,7 @@ 
 
 (define_insn_and_split "*lea<mode>"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-	(match_operand:SWI48 1 "address_no_seg_operand" "p"))]
+	(match_operand:SWI48 1 "address_no_seg_operand" "Ts"))]
   ""
 {
   if (SImode_address_operand (operands[1], VOIDmode))
@@ -18297,7 +18297,7 @@ 
 
 (define_insn "*<mode>_<bndcheck>"
   [(parallel [(unspec [(match_operand:BND 0 "register_operand" "B")
-                       (match_operand:<bnd_ptr> 1 "address_no_seg_operand" "p")] BNDCHECK)
+                       (match_operand:<bnd_ptr> 1 "address_no_seg_operand" "Ts")] BNDCHECK)
               (set (match_operand:BLK 2 "bnd_mem_operator")
                    (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
   "TARGET_MPX"
Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md	(revision 204298)
+++ config/i386/sse.md	(working copy)
@@ -11462,7 +11462,7 @@ 
      [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
       (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
 	[(unspec:P
-	   [(match_operand:P 2 "vsib_address_operand" "p")
+	   [(match_operand:P 2 "vsib_address_operand" "Tv")
 	    (match_operand:VI48_512 1 "register_operand" "v")
 	    (match_operand:SI 3 "const1248_operand" "n")]
 	   UNSPEC_VSIBADDR)])
@@ -11489,7 +11489,7 @@ 
      [(const_int -1)
       (match_operator:<ssescalarmode> 4 "vsib_mem_operator"
 	[(unspec:P
-	   [(match_operand:P 1 "vsib_address_operand" "p")
+	   [(match_operand:P 1 "vsib_address_operand" "Tv")
 	    (match_operand:VI48_512 0 "register_operand" "v")
 	    (match_operand:SI 2 "const1248_operand" "n")]
 	   UNSPEC_VSIBADDR)])
@@ -11533,7 +11533,7 @@ 
      [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
       (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
 	[(unspec:P
-	   [(match_operand:P 2 "vsib_address_operand" "p")
+	   [(match_operand:P 2 "vsib_address_operand" "Tv")
 	    (match_operand:VI48_512 1 "register_operand" "v")
 	    (match_operand:SI 3 "const1248_operand" "n")]
 	   UNSPEC_VSIBADDR)])
@@ -11560,7 +11560,7 @@ 
      [(const_int -1)
       (match_operator:<ssescalarmode> 4 "vsib_mem_operator"
 	[(unspec:P
-	   [(match_operand:P 1 "vsib_address_operand" "p")
+	   [(match_operand:P 1 "vsib_address_operand" "Tv")
 	    (match_operand:VI48_512 0 "register_operand" "v")
 	    (match_operand:SI 2 "const1248_operand" "n")]
 	   UNSPEC_VSIBADDR)])
@@ -13650,7 +13650,7 @@ 
 	  [(match_operand:VEC_GATHER_MODE 2 "register_operand" "0")
 	   (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 3 "vsib_address_operand" "p")
+		[(match_operand:P 3 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXSI> 4 "register_operand" "x")
 		 (match_operand:SI 6 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])
@@ -13670,7 +13670,7 @@ 
 	  [(pc)
 	   (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 2 "vsib_address_operand" "p")
+		[(match_operand:P 2 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXSI> 3 "register_operand" "x")
 		 (match_operand:SI 5 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])
@@ -13712,7 +13712,7 @@ 
 	  [(match_operand:<VEC_GATHER_SRCDI> 2 "register_operand" "0")
 	   (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 3 "vsib_address_operand" "p")
+		[(match_operand:P 3 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXDI> 4 "register_operand" "x")
 		 (match_operand:SI 6 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])
@@ -13732,7 +13732,7 @@ 
 	  [(pc)
 	   (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 2 "vsib_address_operand" "p")
+		[(match_operand:P 2 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "x")
 		 (match_operand:SI 5 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])
@@ -13757,7 +13757,7 @@ 
 	    [(match_operand:<VEC_GATHER_SRCDI> 2 "register_operand" "0")
 	     (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
 	       [(unspec:P
-		  [(match_operand:P 3 "vsib_address_operand" "p")
+		  [(match_operand:P 3 "vsib_address_operand" "Tv")
 		   (match_operand:<VEC_GATHER_IDXDI> 4 "register_operand" "x")
 		   (match_operand:SI 6 "const1248_operand" "n")]
 		  UNSPEC_VSIBADDR)])
@@ -13780,7 +13780,7 @@ 
 	    [(pc)
 	     (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
 	       [(unspec:P
-		  [(match_operand:P 2 "vsib_address_operand" "p")
+		  [(match_operand:P 2 "vsib_address_operand" "Tv")
 		   (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "x")
 		   (match_operand:SI 5 "const1248_operand" "n")]
 		  UNSPEC_VSIBADDR)])
@@ -13822,7 +13822,7 @@ 
 	   (match_operand:<avx512fmaskmode> 7 "register_operand" "2")
 	   (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 4 "vsib_address_operand" "p")
+		[(match_operand:P 4 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXSI> 3 "register_operand" "v")
 		 (match_operand:SI 5 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])]
@@ -13841,7 +13841,7 @@ 
 	   (match_operand:<avx512fmaskmode> 6 "register_operand" "1")
 	   (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 3 "vsib_address_operand" "p")
+		[(match_operand:P 3 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXSI> 2 "register_operand" "v")
 		 (match_operand:SI 4 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])]
@@ -13880,7 +13880,7 @@ 
 	   (match_operand:QI 7 "register_operand" "2")
 	   (match_operator:<ssescalarmode> 6 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 4 "vsib_address_operand" "p")
+		[(match_operand:P 4 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "v")
 		 (match_operand:SI 5 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])]
@@ -13899,7 +13899,7 @@ 
 	   (match_operand:QI 6 "register_operand" "1")
 	   (match_operator:<ssescalarmode> 5 "vsib_mem_operator"
 	     [(unspec:P
-		[(match_operand:P 3 "vsib_address_operand" "p")
+		[(match_operand:P 3 "vsib_address_operand" "Tv")
 		 (match_operand:<VEC_GATHER_IDXDI> 2 "register_operand" "v")
 		 (match_operand:SI 4 "const1248_operand" "n")]
 		UNSPEC_VSIBADDR)])]
@@ -13936,7 +13936,7 @@ 
 (define_insn "*avx512f_scattersi<mode>"
   [(set (match_operator:VI48F_512 5 "vsib_mem_operator"
 	  [(unspec:P
-	     [(match_operand:P 0 "vsib_address_operand" "p")
+	     [(match_operand:P 0 "vsib_address_operand" "Tv")
 	      (match_operand:<VEC_GATHER_IDXSI> 2 "register_operand" "v")
 	      (match_operand:SI 4 "const1248_operand" "n")]
 	     UNSPEC_VSIBADDR)])
@@ -13972,7 +13972,7 @@ 
 (define_insn "*avx512f_scatterdi<mode>"
   [(set (match_operator:VI48F_512 5 "vsib_mem_operator"
 	  [(unspec:P
-	     [(match_operand:P 0 "vsib_address_operand" "p")
+	     [(match_operand:P 0 "vsib_address_operand" "Tv")
 	      (match_operand:V8DI 2 "register_operand" "v")
 	      (match_operand:SI 4 "const1248_operand" "n")]
 	     UNSPEC_VSIBADDR)])