From patchwork Fri Nov 1 10:55:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vineet Gupta X-Patchwork-Id: 287784 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from fraxinus.osuosl.org (fraxinus.osuosl.org [140.211.166.137]) by ozlabs.org (Postfix) with ESMTP id 266842C00CE for ; Fri, 1 Nov 2013 21:55:44 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by fraxinus.osuosl.org (Postfix) with ESMTP id 3A7D98B804; Fri, 1 Nov 2013 10:55:43 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from fraxinus.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id O_gNb6XybMV4; Fri, 1 Nov 2013 10:55:39 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by fraxinus.osuosl.org (Postfix) with ESMTP id BE2478B7F9; Fri, 1 Nov 2013 10:55:39 +0000 (UTC) X-Original-To: uclibc@lists.busybox.net Delivered-To: uclibc@osuosl.org Received: from hemlock.osuosl.org (hemlock.osuosl.org [140.211.166.133]) by ash.osuosl.org (Postfix) with ESMTP id 268F61BF962 for ; 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Fri, 1 Nov 2013 03:55:36 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 785FB849 for ; Fri, 1 Nov 2013 03:55:36 -0700 (PDT) Received: from US01WEHTC3.internal.synopsys.com (us01wehtc3.internal.synopsys.com [10.15.84.232]) by mailhost.synopsys.com (Postfix) with ESMTP id 6FD53848 for ; Fri, 1 Nov 2013 03:55:36 -0700 (PDT) Received: from IN01WEHTCA.internal.synopsys.com (10.144.199.104) by US01WEHTC3.internal.synopsys.com (10.15.84.232) with Microsoft SMTP Server (TLS) id 14.2.298.4; Fri, 1 Nov 2013 03:55:36 -0700 Received: from vineetg-E6520.internal.synopsys.com (10.12.197.76) by IN01WEHTCA.internal.synopsys.com (10.144.199.243) with Microsoft SMTP Server (TLS) id 14.2.298.4; Fri, 1 Nov 2013 16:25:32 +0530 From: Vineet Gupta To: Subject: [PATCH 1/6] elf: Add ARC Magic and Relocations Date: Fri, 1 Nov 2013 16:25:02 +0530 Message-ID: <1383303307-1280-2-git-send-email-vgupta@synopsys.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1383303307-1280-1-git-send-email-vgupta@synopsys.com> References: <1383303307-1280-1-git-send-email-vgupta@synopsys.com> MIME-Version: 1.0 X-Originating-IP: [10.12.197.76] Cc: Vineet Gupta X-BeenThere: uclibc@uclibc.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Discussion and development of uClibc \(the embedded C library\)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: uclibc-bounces@uclibc.org Sender: uclibc-bounces@uclibc.org Signed-off-by: Vineet Gupta --- include/elf.h | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/include/elf.h b/include/elf.h index cbb4da2182b4..3bddcdccadf8 100644 --- a/include/elf.h +++ b/include/elf.h @@ -259,6 +259,7 @@ typedef struct #define EM_PJ 91 /* picoJava */ #define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ #define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ +#define EM_ARCOMPACT 93 /* ARCompact ISA based Cores: ARC 700 */ #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_IP2K 101 /* Ubicom IP2022 micro controller */ #define EM_CR 103 /* National Semiconductor CompactRISC */ @@ -3189,6 +3190,64 @@ typedef Elf32_Addr Elf32_Conflict; #define R_METAG_TLS_DTPMOD 57 #define R_METAG_TLS_DTPOFF 58 +/* ARCompact specific relocs */ +#define R_ARC_NONE 0x0 +#define R_ARC_8 0x1 +#define R_ARC_16 0x2 +#define R_ARC_24 0x3 +#define R_ARC_32 0x4 +#define R_ARC_B26 0x5 +#define R_ARC_B22_PCREL 0x6 +#define R_ARC_H30 0x7 +#define R_ARC_N8 0x8 +#define R_ARC_N16 0x9 +#define R_ARC_N24 0xA +#define R_ARC_N32 0xB +#define R_ARC_SDA 0xC +#define R_ARC_SECTOFF 0xD +#define R_ARC_S21H_PCREL 0xE +#define R_ARC_S21W_PCREL 0xF +#define R_ARC_S25H_PCREL 0x10 +#define R_ARC_S25W_PCREL 0x11 +#define R_ARC_SDA32 0x12 +#define R_ARC_SDA_LDST 0x13 +#define R_ARC_SDA_LDST1 0x14 +#define R_ARC_SDA_LDST2 0x15 +#define R_ARC_SDA16_LD 0x16 +#define R_ARC_SDA16_LD1 0x17 +#define R_ARC_SDA16_LD2 0x18 +#define R_ARC_S13_PCREL 0x19 +#define R_ARC_W 0x1A +#define R_ARC_32_ME 0x1B +#define R_ARC_N32_ME 0x1C +#define R_ARC_SECTOFF_ME 0x1D +#define R_ARC_SDA32_ME 0x1E +#define R_ARC_W_ME 0x1F +#define R_ARC_H30_ME 0x20 +#define R_ARC_SECTOFF_U8 0x21 +#define R_ARC_SECTOFF_S9 0x22 +#define R_AC_SECTOFF_U8 0x23 +#define R_AC_SECTOFF_U8_1 0x24 +#define R_AC_SECTOFF_U8_2 0x25 +#define R_AC_SECTOFF_S9 0x26 +#define R_AC_SECTOFF_S9_1 0x27 +#define R_AC_SECTOFF_S9_2 0x28 +#define R_ARC_SECTOFF_ME_1 0x29 +#define R_ARC_SECTOFF_ME_2 0x2A +#define R_ARC_SECTOFF_1 0x2B +#define R_ARC_SECTOFF_2 0x2C +#define R_ARC_PC32 0x32 +#define R_ARC_GOTPC32 0x33 +#define R_ARC_PLT32 0x34 +#define R_ARC_COPY 0x35 +#define R_ARC_GLOB_DAT 0x36 +#define R_ARC_JMP_SLOT 0x37 +#define R_ARC_RELATIVE 0x38 +#define R_ARC_GOTOFF 0x39 +#define R_ARC_GOTPC 0x3A +#define R_ARC_GOT32 0x3B +#define R_ARC_NUM 0x3C + #ifdef __cplusplus } #endif