From patchwork Fri Nov 1 08:44:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 287740 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E2B4D2C00B1 for ; Fri, 1 Nov 2013 19:44:43 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:content-type; q= dns; s=default; b=lzqIAxWD44ey0Xs5wMFC0NtKZXQf5WajzqIGQ8w1Lx40kp NKkt8AYcdm1qyu9fGUG1CO4uBYi8dGsMkaU9veUPgEJgqD5aog+5zZoYjjp92C2G Ma/s5rov7MYHmZ5SnLDImdbEpy+dPJ8SrS9hIkLvFnSOpWcLcV1ZE2wXMREts= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:content-type; s= default; bh=je8R6oMG1NL6LIIEY/lS/P6Fa0E=; b=DS818mWPlCurt1d2HJSg H6SNwX6ck9+r5QPGid3VK2tvvXFP7TwYNAFxPruq7qUYzTxcguIN3VNxRx8DWQt/ UEdLfEIVe2L0+06/hfsocOECu/g0MhcILxrJaf/3FAO1ibBsFg91nzT/YbOlALcE H+mTYJp16gPEqofoAN344RM= Received: (qmail 20158 invoked by alias); 1 Nov 2013 08:44:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 20146 invoked by uid 89); 1 Nov 2013 08:44:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f170.google.com Received: from mail-ob0-f170.google.com (HELO mail-ob0-f170.google.com) (209.85.214.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 01 Nov 2013 08:44:35 +0000 Received: by mail-ob0-f170.google.com with SMTP id wp18so4294426obc.29 for ; Fri, 01 Nov 2013 01:44:33 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.182.81.41 with SMTP id w9mr1710954obx.18.1383295473090; Fri, 01 Nov 2013 01:44:33 -0700 (PDT) Received: by 10.182.137.136 with HTTP; Fri, 1 Nov 2013 01:44:32 -0700 (PDT) Date: Fri, 1 Nov 2013 09:44:32 +0100 Message-ID: Subject: [PATCH, i386]: Change HAVE_AS_IX86_INTERUNIT_MOVQ to runtime test ... From: Uros Bizjak To: "gcc-patches@gcc.gnu.org" Hello! ... so it can be used in insn output templates. 2013-11-01 Uros Bizjak * configure.ac (HAVE_AS_IX86_INTERUNIT_MOVQ): Always define as 0/1. * configure: Regenerate. * config/i386/i386.md (*movdi_internal): Change HAVE_AS_IX86_INTERUNIT_MOVQ to runtime check. (*movdf_internal): Ditto. * config/i386/mmx.md (*mov_internal): Ditto. * config/i386/sse.md (vec_concatv2di): Output interunit movq for HAVE_AS_IX86_INTERUNIT_MOVQ targets. Tested on x86_64-pc-linux-gnu {,-m32} and committed to mainline SVN. Uros. Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 204286) +++ config/i386/i386.md (working copy) @@ -2007,11 +2007,10 @@ return "pxor\t%0, %0"; case TYPE_MMXMOV: -#ifndef HAVE_AS_IX86_INTERUNIT_MOVQ /* Handle broken assemblers that require movd instead of movq. */ - if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])) + if (!HAVE_AS_IX86_INTERUNIT_MOVQ + && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; -#endif return "movq\t{%1, %0|%0, %1}"; case TYPE_SSELOG1: @@ -2024,11 +2023,10 @@ switch (get_attr_mode (insn)) { case MODE_DI: -#ifndef HAVE_AS_IX86_INTERUNIT_MOVQ /* Handle broken assemblers that require movd instead of movq. */ - if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])) + if (!HAVE_AS_IX86_INTERUNIT_MOVQ + && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; -#endif return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; @@ -2944,12 +2942,11 @@ return "movlpd\t{%1, %0|%0, %1}"; case MODE_DI: -#ifndef HAVE_AS_IX86_INTERUNIT_MOVQ /* Handle broken assemblers that require movd instead of movq. */ - if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])) + if (!HAVE_AS_IX86_INTERUNIT_MOVQ + && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; -#endif - return "%vmovq\t{%1, %0|%0, %1}"; + return "%vmovq\t{%1, %0|%0, %1}"; default: gcc_unreachable (); Index: config/i386/mmx.md =================================================================== --- config/i386/mmx.md (revision 204286) +++ config/i386/mmx.md (working copy) @@ -99,11 +99,10 @@ return "pxor\t%0, %0"; case TYPE_MMXMOV: -#ifndef HAVE_AS_IX86_INTERUNIT_MOVQ /* Handle broken assemblers that require movd instead of movq. */ - if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])) + if (!HAVE_AS_IX86_INTERUNIT_MOVQ + && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "movd\t{%1, %0|%0, %1}"; -#endif return "movq\t{%1, %0|%0, %1}"; case TYPE_SSECVT: @@ -119,15 +118,13 @@ switch (get_attr_mode (insn)) { case MODE_DI: -#ifndef HAVE_AS_IX86_INTERUNIT_MOVQ /* Handle broken assemblers that require movd instead of movq. */ - if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])) + if (!HAVE_AS_IX86_INTERUNIT_MOVQ + && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; -#endif return "%vmovq\t{%1, %0|%0, %1}"; case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; - case MODE_XI: return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; Index: config/i386/sse.md =================================================================== --- config/i386/sse.md (revision 204286) +++ config/i386/sse.md (working copy) @@ -9489,7 +9489,7 @@ "@ pinsrq\t{$1, %2, %0|%0, %2, 1} vpinsrq\t{$1, %2, %1, %0|%0, %1, %2, 1} - %vmovd\t{%1, %0|%0, %1} + * return HAVE_AS_IX86_INTERUNIT_MOVQ ? \"%vmovq\t{%1, %0|%0, %1}\" : \"%vmovd\t{%1, %0|%0, %1}\"; %vmovq\t{%1, %0|%0, %1} movq2dq\t{%1, %0|%0, %1} punpcklqdq\t{%2, %0|%0, %2} Index: configure.ac =================================================================== --- configure.ac (revision 204286) +++ configure.ac (working copy) @@ -3754,9 +3754,10 @@ gcc_cv_as_ix86_interunit_movq,,, [.code64 movq %mm0, %rax - movq %rax, %xmm0],, - [AC_DEFINE(HAVE_AS_IX86_INTERUNIT_MOVQ, 1, - [Define if your assembler supports interunit movq mnemonic.])]) + movq %rax, %xmm0]) + AC_DEFINE_UNQUOTED(HAVE_AS_IX86_INTERUNIT_MOVQ, + [`if test $gcc_cv_as_ix86_interunit_movq = yes; then echo 1; else echo 0; fi`], + [Define if your assembler supports interunit movq mnemonic.]) gcc_GAS_CHECK_FEATURE([hle prefixes], gcc_cv_as_ix86_hle,,,