From patchwork Thu Oct 31 17:37:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 287579 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9373B2C0367 for ; Fri, 1 Nov 2013 04:38:45 +1100 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VbwCE-0006To-CY; Thu, 31 Oct 2013 17:38:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VbwC1-0006uM-Qj; Thu, 31 Oct 2013 17:38:01 +0000 Received: from mail-pb0-x22f.google.com ([2607:f8b0:400e:c01::22f]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VbwBz-0006tR-IG for linux-arm-kernel@lists.infradead.org; Thu, 31 Oct 2013 17:38:00 +0000 Received: by mail-pb0-f47.google.com with SMTP id rq2so3098169pbb.20 for ; Thu, 31 Oct 2013 10:37:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=pUoZpMwAlOq5xuji0JELjJJ5iSf6VHO7YNuLHaN/s4o=; b=O0PNyx1YNq8g0tWjUEOsmX1K7SR4eT8extUxQWwm2p/gaNUu8/7IMAVaAD+t2KpjsX o2yL1aa6rWNKQRIY4j3fPusGq9pYUjYjgd7XGAOtiNEc+uk+7aGkMT5I2wy5Nvy8qFQq uZErO5PPBdknZqPSo70YK44MK9HAEDnMMkVRaLe9yUKSHF2RGJFlLIf3tTQg+xhojtMH 6QkETfv3euF/5Q66drey/3fKWfrYQsuYBO7kjswWie2Jwp9e1fGlsZhcfGbz6TSJSt6x BiHHPrUjHRci+NNv7nbRTs6xoK3jZMTH/aLaoXtIfKqviVaKKpiXKALdrIXvHT5lfESK FOKQ== X-Received: by 10.68.196.227 with SMTP id ip3mr3062738pbc.163.1383241055447; Thu, 31 Oct 2013 10:37:35 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id xs1sm6886442pac.7.2013.10.31.10.37.33 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 31 Oct 2013 10:37:34 -0700 (PDT) From: Soren Brinkmann To: Michal Simek , Russell King , Peter Crosthwaite Subject: [PATCH] arm: zynq: platsmp: Remove CPU presence check Date: Thu, 31 Oct 2013 10:37:09 -0700 Message-Id: <1383241029-32018-1-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 1.8.4.1 In-Reply-To: <20131031161739.GE16735@n2100.arm.linux.org.uk> References: <20131031161739.GE16735@n2100.arm.linux.org.uk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131031_133759_681346_1421BA20 X-CRM114-Status: GOOD ( 10.28 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (soeren.brinkmann[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?S=C3=B6ren=20Brinkmann?= X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The generic code already checks that the CPU being requested is legal if the cpu possible/present masks are set correctly. Cc: Russell King Signed-off-by: Soren Brinkmann --- As per Russel's suggestion, consider this alternative for 1/6. Sören arch/arm/mach-zynq/platsmp.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c index bc730eb38f00..8021499e7b70 100644 --- a/arch/arm/mach-zynq/platsmp.c +++ b/arch/arm/mach-zynq/platsmp.c @@ -39,11 +39,6 @@ int zynq_cpun_start(u32 address, int cpu) u32 trampoline_code_size = &zynq_secondary_trampoline_end - &zynq_secondary_trampoline; - if (cpu > ncores) { - pr_warn("CPU No. is not available in the system\n"); - return -1; - } - /* MS: Expectation that SLCR are directly map and accessible */ /* Not possible to jump to non aligned address */ if (!(address & 3) && (!address || (address >= trampoline_code_size))) {