Patchwork [U-Boot,2/2] arm: zynq : Revert TZ_DDR_RAM to secure.

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Submitter Michal Simek
Date Oct. 30, 2013, 2:54 p.m.
Message ID <4fe79f8236de3f8c9039f182c7d8aa996511e261.1383144893.git.michal.simek@xilinx.com>
Download mbox | patch
Permalink /patch/287259/
State Accepted
Delegated to: Albert ARIBAUD
Headers show

Comments

Michal Simek - Oct. 30, 2013, 2:54 p.m.
From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>

TZ_DDR_RAM on reset is in secure mode.
Since uboot and linux runs in full
TZ privilege secure mode, no need
to set DDR trustzone to non-secure.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 arch/arm/cpu/armv7/zynq/cpu.c | 2 --
 1 file changed, 2 deletions(-)

--
1.8.2.3

Patch

diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c
index 0ca5d8a..9af340e 100644
--- a/arch/arm/cpu/armv7/zynq/cpu.c
+++ b/arch/arm/cpu/armv7/zynq/cpu.c
@@ -29,8 +29,6 @@  int arch_cpu_init(void)
 	writel(0x1F, &slcr_base->ocm_cfg);
 	/* FPGA_RST_CTRL, clear resets on AXI fabric ports */
 	writel(0x0, &slcr_base->fpga_rst_ctrl);
-	/* TZ_DDR_RAM, Set DDR trust zone non-secure */
-	writel(0xFFFFFFFF, &slcr_base->trust_zone);
 	/* Set urgent bits with register */
 	writel(0x0, &slcr_base->ddr_urgent_sel);
 	/* Urgent write, ports S2/S3 */