From patchwork Wed Oct 30 14:54:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 287258 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6F9762C0391 for ; Thu, 31 Oct 2013 01:55:18 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 53BD44A13C; Wed, 30 Oct 2013 15:55:15 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NibSV3iABJJc; Wed, 30 Oct 2013 15:55:15 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 987E04A11F; Wed, 30 Oct 2013 15:55:11 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7AB424A11F for ; Wed, 30 Oct 2013 15:55:10 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QuSPC8+ItC6B for ; Wed, 30 Oct 2013 15:55:05 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ea0-f171.google.com (mail-ea0-f171.google.com [209.85.215.171]) by theia.denx.de (Postfix) with ESMTPS id 4621B4A118 for ; Wed, 30 Oct 2013 15:54:59 +0100 (CET) Received: by mail-ea0-f171.google.com with SMTP id h10so719347eak.2 for ; Wed, 30 Oct 2013 07:54:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id :content-type; bh=Yh2p1l6GtCdaQNBHU9YgKBcDsiQy2o+mgtnVFcZiPPM=; b=iqLBhXaAIanXHjWczwiCgT1kvSqYSBwPwDwEhVuAOADg7VrR+KKoxzhHQfuoJxKuT9 3QIUXjbKtr5V/4WMVodBVH6JV3jksWPlxQyul3t9gU44fQfaC27kMZMvb7QEnbNU3Y0u SD8KZ52QgdQVk5V8X/CVy7zBce9k/v/5MEYcXTRgOXTsOlSCna/piQqw3tESpcMdW9G8 YkeewwCtViEPqVu+GBNjy9wQbMud5uvgte6yCZR9MFe/vc8ttccc7fyYGDzmSExMbV9E KWntDGCRrhj83oJQbREhutdNITNk3F2L7SP8NC8oJZcey2H3saubxCA3g1XeXYt9mR8z KVOg== X-Gm-Message-State: ALoCoQmWkwU5ckV8FGaGGYlZ1mag8RytQUjyXM1MSigpKJj21qnr+FJPSgK1VHyM06CUUl32j0vk X-Received: by 10.15.31.9 with SMTP id x9mr2915009eeu.53.1383144898743; Wed, 30 Oct 2013 07:54:58 -0700 (PDT) Received: from localhost (nat-63.starnet.cz. [178.255.168.63]) by mx.google.com with ESMTPSA id x47sm84446622eea.16.2013.10.30.07.54.57 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Wed, 30 Oct 2013 07:54:57 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, Albert Aribaud Date: Wed, 30 Oct 2013 15:54:55 +0100 Message-Id: <4fe337a85180cbc29a4f0a7daeff4121d90b4b94.1383144893.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.8.2.3 Subject: [U-Boot] [PATCH 1/2] arm: zynq: Do not remap OCM to high address X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de In case where ps-ddr is not used, do not remap OCM to high address and keep it from 0x0. Linux SMP requires to have memory at 0x0. Signed-off-by: Michal Simek --- arch/arm/cpu/armv7/zynq/cpu.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) -- 1.8.2.3 diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index 2bb3843..0ca5d8a 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -16,13 +16,15 @@ void lowlevel_init(void) int arch_cpu_init(void) { zynq_slcr_unlock(); - /* remap DDR to zero, FILTERSTART */ - writel(0, &scu_base->filter_start); /* Device config APB, unlock the PCAP */ writel(0x757BDF0D, &devcfg_base->unlock); writel(0xFFFFFFFF, &devcfg_base->rom_shadow); +#if (CONFIG_SYS_SDRAM_BASE == 0) + /* remap DDR to zero, FILTERSTART */ + writel(0, &scu_base->filter_start); + /* OCM_CFG, Mask out the ROM, map ram into upper addresses */ writel(0x1F, &slcr_base->ocm_cfg); /* FPGA_RST_CTRL, clear resets on AXI fabric ports */ @@ -33,6 +35,7 @@ int arch_cpu_init(void) writel(0x0, &slcr_base->ddr_urgent_sel); /* Urgent write, ports S2/S3 */ writel(0xC, &slcr_base->ddr_urgent); +#endif zynq_slcr_lock();