diff mbox

[U-Boot,RFC,7/7] spl: mmc: FAT support boot u-boot

Message ID 1383124508-8413-8-git-send-email-voice.shen@atmel.com
State RFC, archived
Delegated to: Andreas Bießmann
Headers show

Commit Message

Bo Shen Oct. 30, 2013, 9:15 a.m. UTC
Enable SPL support which can load u-boot from SD card in FAT format.

Signed-off-by: Bo Shen <voice.shen@atmel.com>

---
 arch/arm/cpu/armv7/Makefile            |    2 +-
 arch/arm/cpu/armv7/at91/u-boot-spl.lds |   50 +++++++++++++
 arch/arm/include/asm/arch-at91/spl.h   |   17 +++++
 board/atmel/sama5d3xek/sama5d3xek.c    |  123 ++++++++++++++++++++++++++++++++
 include/configs/sama5d3xek.h           |   37 ++++++++++
 5 files changed, 228 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/at91/u-boot-spl.lds
 create mode 100644 arch/arm/include/asm/arch-at91/spl.h

Comments

Heiko Schocher Oct. 30, 2013, 10:15 a.m. UTC | #1
Hello Bo,

Am 30.10.2013 10:15, schrieb Bo Shen:
> Enable SPL support which can load u-boot from SD card in FAT format.
>
> Signed-off-by: Bo Shen<voice.shen@atmel.com>
>
> ---
>   arch/arm/cpu/armv7/Makefile            |    2 +-
>   arch/arm/cpu/armv7/at91/u-boot-spl.lds |   50 +++++++++++++
>   arch/arm/include/asm/arch-at91/spl.h   |   17 +++++
>   board/atmel/sama5d3xek/sama5d3xek.c    |  123 ++++++++++++++++++++++++++++++++
>   include/configs/sama5d3xek.h           |   37 ++++++++++
>   5 files changed, 228 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/cpu/armv7/at91/u-boot-spl.lds
>   create mode 100644 arch/arm/include/asm/arch-at91/spl.h
[...]
> diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
> index 7fa3ae7..4a5aea3 100644
> --- a/board/atmel/sama5d3xek/sama5d3xek.c
> +++ b/board/atmel/sama5d3xek/sama5d3xek.c
> @@ -20,6 +20,9 @@
>   #include<micrel.h>
>   #include<net.h>
>   #include<netdev.h>
> +#include<spl.h>
> +#include<asm/arch/atmel_mpddrc.h>
> +#include<asm/arch/at91_wdt.h>
>
>   #ifdef CONFIG_USB_GADGET_ATMEL_USBA
>   #include<asm/arch/atmel_usba_udc.h>
> @@ -293,3 +296,123 @@ void spi_cs_deactivate(struct spi_slave *slave)
>   	}
>   }
>   #endif /* CONFIG_ATMEL_SPI */
> +
> +/* NAND SPL */
> +#ifdef CONFIG_SPL_BUILD
> +void spl_board_init(void)
> +{
> +	sama5d3xek_mci_hw_init();
> +}
> +
> +u32 spl_boot_device(void)
> +{
> +	return BOOT_DEVICE_MMC1;
> +}
> +
> +u32 spl_boot_mode(void)
> +{
> +	switch (spl_boot_device()) {
> +	case BOOT_DEVICE_MMC1:
> +		return MMCSD_MODE_FAT;
> +		break;
> +	default:
> +		hang();
> +	}
> +}
> +
> +void ddr2_conf(struct atmel_mpddr *ddr2)
> +{
> +	ddr2->mdr = (ATMEL_MPDDRC_MDR_DBW_32BITS | ATMEL_MPDDRC_MDR_DDR2_SDRAM);
> +
> +	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
> +		    ATMEL_MPDDRC_CR_NR_ROW_14 |
> +		    ATMEL_MPDDRC_CR_CAS_3 |
> +		    ATMEL_MPDDRC_CR_EN_ENRDM |
> +		    ATMEL_MPDDRC_CR_NB_8BANKS |
> +		    ATMEL_MPDDRC_CR_DIS_NDQS |
> +		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
> +		    ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
> +
> +	ddr2->rtr = 0x411;
> +
> +	ddr2->tp0r = (6<<  ATMEL_MPDDRC_TP0R_TRAS_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP0R_TRCD_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP0R_TWR_OFFSET |
> +		      8<<  ATMEL_MPDDRC_TP0R_TRC_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP0R_TRP_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP0R_TRRD_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP0R_TWTR_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP0R_TMRD_OFFSET);
> +
> +	ddr2->tp1r = (2<<  ATMEL_MPDDRC_TP1R_TXP_OFFSET |
> +		      200<<  ATMEL_MPDDRC_TP1R_TXSRD_OFFSET |
> +		      28<<  ATMEL_MPDDRC_TP1R_TXSNR_OFFSET |
> +		      26<<  ATMEL_MPDDRC_TP1R_TRFC_OFFSET);
> +
> +	ddr2->tp2r = (7<<  ATMEL_MPDDRC_TP2R_TFAW_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP2R_TRTP_OFFSET |
> +		      2<<  ATMEL_MPDDRC_TP2R_TRPA_OFFSET |
> +		      7<<  ATMEL_MPDDRC_TP2R_TXARDS_OFFSET |
> +		      8<<  ATMEL_MPDDRC_TP2R_TXARD_OFFSET);
> +}
> +
> +void mem_init(void)
> +{
> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +	struct atmel_mpddr ddr2;
> +
> +	ddr2_conf(&ddr2);
> +
> +	/* enable MPDDR clock */
> +	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
> +	writel(0x4,&pmc->scer);
> +
> +	/* DDRAM2 Controller initialize */
> +	ddr2_init(ATMEL_BASE_DDRCS,&ddr2);
> +}
> +
> +static void at91_disable_wdt(void)
> +{
> +	struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
> +
> +	writel(AT91_WDT_MR_WDDIS,&wdt->mr);
> +}
> +
> +static void sama5d3xek_plla_init(void)
> +{
> +	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +	u32 tmp;
> +
> +	tmp = AT91_PMC_PLLAR_29 |
> +	      AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
> +	      AT91_PMC_PLLXR_MUL(43) |
> +	      AT91_PMC_PLLXR_DIV(1);
> +	at91_plla_init(tmp, 10000);
> +
> +	writel(0x3<<  8,&pmc->pllicpr);
> +}
> +
> +void s_init(void)
> +{
> +	u32 tmp;
> +
> +	/* disable watchdog */
> +	at91_disable_wdt();
> +
> +	/* PMC configuration */
> +	sama5d3xek_plla_init();
> +	tmp = AT91_PMC_MCKR_MDIV_4 |
> +	      AT91_PMC_MCKR_CSS_PLLA;
> +	at91_mck_init(tmp, 10000);
> +
> +	at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
> +
> +	timer_init();
> +
> +	board_early_init_f();
> +
> +	preloader_console_init();
> +
> +	mem_init();
> +}
> +#endif

All this functions could be moved to a common file, I vote for:

arch/arm/cpu/arm926ejs/at91/spl.c

What do you think?

bye,
Heiko
Andreas Bießmann Oct. 30, 2013, 10:43 a.m. UTC | #2
Hello Heiko,

On 10/30/2013 11:15 AM, Heiko Schocher wrote:
> Hello Bo,
> 
> Am 30.10.2013 10:15, schrieb Bo Shen:

<snip code>

> All this functions could be moved to a common file, I vote for:
> 
> arch/arm/cpu/arm926ejs/at91/spl.c
> 
> What do you think?

That's not that easy ... sama5 is an armv7 SoC. So we need some special
at91 library directory or something like this.

Best regards

Andreas Bießmann
Heiko Schocher Oct. 30, 2013, 10:57 a.m. UTC | #3
Hello Andreas,

Am 30.10.2013 11:43, schrieb Andreas Bießmann:
> Hello Heiko,
>
> On 10/30/2013 11:15 AM, Heiko Schocher wrote:
>> Hello Bo,
>>
>> Am 30.10.2013 10:15, schrieb Bo Shen:
>
> <snip code>
>
>> All this functions could be moved to a common file, I vote for:
>>
>> arch/arm/cpu/arm926ejs/at91/spl.c
>>
>> What do you think?
>
> That's not that easy ... sama5 is an armv7 SoC. So we need some special
> at91 library directory or something like this.

Ah, armv7 and I work on an at91sam920, which is arm926 ... Hmm...
I started with a

arch/arm/cpu/arm926ejs/at91/spl.c

Ok... so we need a place for both archs ... Hmm, something like

arch/arm/cpu/at91-common/spl.c ?

bye,
Heiko
Andreas Bießmann Oct. 30, 2013, 11:02 a.m. UTC | #4
Hi Heiko,

+Albert

On 10/30/2013 11:57 AM, Heiko Schocher wrote:
> Hello Andreas,
> 
> Am 30.10.2013 11:43, schrieb Andreas Bießmann:
>> Hello Heiko,
>>
>> On 10/30/2013 11:15 AM, Heiko Schocher wrote:
>>> Hello Bo,
>>>
>>> Am 30.10.2013 10:15, schrieb Bo Shen:
>>
>> <snip code>
>>
>>> All this functions could be moved to a common file, I vote for:
>>>
>>> arch/arm/cpu/arm926ejs/at91/spl.c
>>>
>>> What do you think?
>>
>> That's not that easy ... sama5 is an armv7 SoC. So we need some special
>> at91 library directory or something like this.
> 
> Ah, armv7 and I work on an at91sam920, which is arm926 ... Hmm...
> I started with a
> 
> arch/arm/cpu/arm926ejs/at91/spl.c
> 
> Ok... so we need a place for both archs ... Hmm, something like
> 
> arch/arm/cpu/at91-common/spl.c ?

I think that is Ok.

Best regards

Andreas Bießmann
Bo Shen Oct. 31, 2013, 1:30 a.m. UTC | #5
Hi Heiko, Andreas,

On 10/30/2013 19:02, Andreas Bießmann wrote:
> Hi Heiko,
>
> +Albert
>
> On 10/30/2013 11:57 AM, Heiko Schocher wrote:
>> Hello Andreas,
>>
>> Am 30.10.2013 11:43, schrieb Andreas Bießmann:
>>> Hello Heiko,
>>>
>>> On 10/30/2013 11:15 AM, Heiko Schocher wrote:
>>>> Hello Bo,
>>>>
>>>> Am 30.10.2013 10:15, schrieb Bo Shen:
>>>
>>> <snip code>
>>>
>>>> All this functions could be moved to a common file, I vote for:
>>>>
>>>> arch/arm/cpu/arm926ejs/at91/spl.c
>>>>
>>>> What do you think?
>>>
>>> That's not that easy ... sama5 is an armv7 SoC. So we need some special
>>> at91 library directory or something like this.
>>
>> Ah, armv7 and I work on an at91sam920, which is arm926 ... Hmm...
>> I started with a
>>
>> arch/arm/cpu/arm926ejs/at91/spl.c
>>
>> Ok... so we need a place for both archs ... Hmm, something like
>>
>> arch/arm/cpu/at91-common/spl.c ?
>
> I think that is Ok.

OK, I will try this in RFC v2.

> Best regards
>
> Andreas Bießmann

Best Regards,
Bo Shen
Heiko Schocher Oct. 31, 2013, 7:42 a.m. UTC | #6
Hello Bo,

Am 30.10.2013 10:15, schrieb Bo Shen:
> Enable SPL support which can load u-boot from SD card in FAT format.
>
> Signed-off-by: Bo Shen<voice.shen@atmel.com>
>
> ---
>   arch/arm/cpu/armv7/Makefile            |    2 +-
>   arch/arm/cpu/armv7/at91/u-boot-spl.lds |   50 +++++++++++++

Why do you need a special lds file?

Does arch/arm/cpu/u-boot-spl.lds not fit for you?

bye,
Heiko
Bo Shen Oct. 31, 2013, 7:50 a.m. UTC | #7
Hi Heiko,

On 10/31/2013 15:42, Heiko Schocher wrote:
> Hello Bo,
>
> Am 30.10.2013 10:15, schrieb Bo Shen:
>> Enable SPL support which can load u-boot from SD card in FAT format.
>>
>> Signed-off-by: Bo Shen<voice.shen@atmel.com>
>>
>> ---
>>   arch/arm/cpu/armv7/Makefile            |    2 +-
>>   arch/arm/cpu/armv7/at91/u-boot-spl.lds |   50 +++++++++++++
>
> Why do you need a special lds file?
>
> Does arch/arm/cpu/u-boot-spl.lds not fit for you?

As the bss segment is too big, which exceed the size of sram, it needs 
to put the bss into sdram. So, I add this lds file.

> bye,
> Heiko

Best Regards,
Bo Shen
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index ee4b021..4246f1f 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -16,7 +16,7 @@  COBJS	+= cache_v7.o
 COBJS	+= cpu.o
 COBJS	+= syslib.o
 
-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_SAMA5D3),)
 SOBJS	+= lowlevel_init.o
 endif
 
diff --git a/arch/arm/cpu/armv7/at91/u-boot-spl.lds b/arch/arm/cpu/armv7/at91/u-boot-spl.lds
new file mode 100644
index 0000000..038335d
--- /dev/null
+++ b/arch/arm/cpu/armv7/at91/u-boot-spl.lds
@@ -0,0 +1,50 @@ 
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *	Aneesh V <aneesh@ti.com>
+ *
+ * (C) 2013 Atmel Corporation
+ *	    Bo Shen <voice.shen@atmel.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	.text      :
+	{
+		__start = .;
+		arch/arm/cpu/armv7/start.o	(.text*)
+		*(.text*)
+	} >.sram
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
+
+	. = ALIGN(4);
+	.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+	_end = .;
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start = .;
+		*(.bss*)
+		. = ALIGN(4);
+		__bss_end = .;
+	} >.sdram
+}
diff --git a/arch/arm/include/asm/arch-at91/spl.h b/arch/arm/include/asm/arch-at91/spl.h
new file mode 100644
index 0000000..5bbd4fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-at91/spl.h
@@ -0,0 +1,17 @@ 
+/*
+ * Copyright (C) 2013 Atmel Corporation
+ *		      Bo Shen <voice.shen@atmel.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef	_ASM_ARCH_SPL_H_
+#define	_ASM_ARCH_SPL_H_
+
+enum {
+	BOOT_DEVICE_MMC1,
+	BOOT_DEVICE_MMC2,
+	BOOT_DEVICE_MMC2_2,
+};
+
+#endif
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index 7fa3ae7..4a5aea3 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -20,6 +20,9 @@ 
 #include <micrel.h>
 #include <net.h>
 #include <netdev.h>
+#include <spl.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/at91_wdt.h>
 
 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
 #include <asm/arch/atmel_usba_udc.h>
@@ -293,3 +296,123 @@  void spi_cs_deactivate(struct spi_slave *slave)
 	}
 }
 #endif /* CONFIG_ATMEL_SPI */
+
+/* NAND SPL */
+#ifdef CONFIG_SPL_BUILD
+void spl_board_init(void)
+{
+	sama5d3xek_mci_hw_init();
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_MMC1;
+}
+
+u32 spl_boot_mode(void)
+{
+	switch (spl_boot_device()) {
+	case BOOT_DEVICE_MMC1:
+		return MMCSD_MODE_FAT;
+		break;
+	default:
+		hang();
+	}
+}
+
+void ddr2_conf(struct atmel_mpddr *ddr2)
+{
+	ddr2->mdr = (ATMEL_MPDDRC_MDR_DBW_32BITS | ATMEL_MPDDRC_MDR_DDR2_SDRAM);
+
+	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_14 |
+		    ATMEL_MPDDRC_CR_CAS_3 |
+		    ATMEL_MPDDRC_CR_EN_ENRDM |
+		    ATMEL_MPDDRC_CR_NB_8BANKS |
+		    ATMEL_MPDDRC_CR_DIS_NDQS |
+		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
+		    ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
+
+	ddr2->rtr = 0x411;
+
+	ddr2->tp0r = (6 << ATMEL_MPDDRC_TP0R_TRAS_OFFSET |
+		      2 << ATMEL_MPDDRC_TP0R_TRCD_OFFSET |
+		      2 << ATMEL_MPDDRC_TP0R_TWR_OFFSET |
+		      8 << ATMEL_MPDDRC_TP0R_TRC_OFFSET |
+		      2 << ATMEL_MPDDRC_TP0R_TRP_OFFSET |
+		      2 << ATMEL_MPDDRC_TP0R_TRRD_OFFSET |
+		      2 << ATMEL_MPDDRC_TP0R_TWTR_OFFSET |
+		      2 << ATMEL_MPDDRC_TP0R_TMRD_OFFSET);
+
+	ddr2->tp1r = (2 << ATMEL_MPDDRC_TP1R_TXP_OFFSET |
+		      200 << ATMEL_MPDDRC_TP1R_TXSRD_OFFSET |
+		      28 << ATMEL_MPDDRC_TP1R_TXSNR_OFFSET |
+		      26 << ATMEL_MPDDRC_TP1R_TRFC_OFFSET);
+
+	ddr2->tp2r = (7 << ATMEL_MPDDRC_TP2R_TFAW_OFFSET |
+		      2 << ATMEL_MPDDRC_TP2R_TRTP_OFFSET |
+		      2 << ATMEL_MPDDRC_TP2R_TRPA_OFFSET |
+		      7 << ATMEL_MPDDRC_TP2R_TXARDS_OFFSET |
+		      8 << ATMEL_MPDDRC_TP2R_TXARD_OFFSET);
+}
+
+void mem_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct atmel_mpddr ddr2;
+
+	ddr2_conf(&ddr2);
+
+	/* enable MPDDR clock */
+	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
+	writel(0x4, &pmc->scer);
+
+	/* DDRAM2 Controller initialize */
+	ddr2_init(ATMEL_BASE_DDRCS, &ddr2);
+}
+
+static void at91_disable_wdt(void)
+{
+	struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
+
+	writel(AT91_WDT_MR_WDDIS, &wdt->mr);
+}
+
+static void sama5d3xek_plla_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	u32 tmp;
+
+	tmp = AT91_PMC_PLLAR_29 |
+	      AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
+	      AT91_PMC_PLLXR_MUL(43) |
+	      AT91_PMC_PLLXR_DIV(1);
+	at91_plla_init(tmp, 10000);
+
+	writel(0x3 << 8, &pmc->pllicpr);
+}
+
+void s_init(void)
+{
+	u32 tmp;
+
+	/* disable watchdog */
+	at91_disable_wdt();
+
+	/* PMC configuration */
+	sama5d3xek_plla_init();
+	tmp = AT91_PMC_MCKR_MDIV_4 |
+	      AT91_PMC_MCKR_CSS_PLLA;
+	at91_mck_init(tmp, 10000);
+
+	at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
+
+	timer_init();
+
+	board_early_init_f();
+
+	preloader_console_init();
+
+	mem_init();
+}
+#endif
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 79c0068..53ec27e 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -25,7 +25,10 @@ 
 #define CONFIG_AT91FAMILY
 #define CONFIG_ARCH_CPU_INIT
 
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DISPLAY_CPUINFO
 
@@ -94,8 +97,12 @@ 
 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_INIT_SP_ADDR		0x310000
+#else
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+#endif
 
 /* SerialFlash */
 #define CONFIG_CMD_SF
@@ -235,4 +242,34 @@ 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
 
+/* SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SPL_TEXT_BASE		0x300000
+#define CONFIG_SPL_MAX_SIZE		0x10000
+
+#define CONFIG_SPL_BSS_START_ADDR	0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+
+#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
+
+#define CONFIG_SPL_LDSCRIPT		$(CPUDIR)/at91/u-boot-spl.lds
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+
 #endif