| Message ID | 1383046062-16520-1-git-send-email-Bharat.Bhushan@freescale.com |
|---|---|
| State | Superseded |
| Headers | show |
From: Bharat Bhushan <bharat.bhushan@freescale.com>
PAMU (FSL IOMMU) has a concept of primary window and subwindows.
Primary window corresponds to the complete guest iova address space
(including MSI space), with respect to IOMMU_API this is termed as
geometry. IOVA Base of subwindow is determined from the number of
subwindows (configurable using iommu API).
MSI I/O page must be within the geometry and maximum supported
subwindows, so MSI IO-page is setup just after guest memory iova space.
So first four patches are for defining the interface to get:
- Number of MSI regions (which is number of MSI banks for powerpc)
- MSI-region address range: Physical page which have the
address/addresses used for generating MSI interrupt
and size of the page.
Last Patch is for setting up MSI iova-base for vfio devices assigned
in msi subsystem, so that when msi-message will be composed then this
configured iova will be used. Earlier we were using iommu interface
for getting the configured iova which was not currect and
Alex Williamson suggeested this type of interface.
Bharat Bhushan (5):
pci:msi: add weak function for returning msi region info
powerpc: pci: Add arch specific msi region interface
powerpc: msi: Extend the msi region interface to get info from
fsl_msi
pci: msi: expose msi region information functions
vfio: setup iova-base for msi interrupts for vfio assigned device
arch/powerpc/include/asm/machdep.h | 10 ++++
arch/powerpc/kernel/msi.c | 28 ++++++++++
arch/powerpc/sysdev/fsl_msi.c | 106 ++++++++++++++++++++++++++++++++++--
arch/powerpc/sysdev/fsl_msi.h | 19 ++++++-
drivers/pci/msi.c | 34 ++++++++++++
include/linux/msi.h | 14 +++++
include/linux/pci.h | 21 +++++++
7 files changed, 223 insertions(+), 9 deletions(-)
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diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index d5f90d6..2643a29 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -67,6 +67,28 @@ int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type) return chip->check_device(chip, dev, nvec, type); } +int __weak arch_msi_get_region_count(void) +{ + return 0; +} + +int __weak arch_msi_get_region(int region_num, struct msi_region *region) +{ + return 0; +} + +int msi_get_region_count(void) +{ + return arch_msi_get_region_count(); +} +EXPORT_SYMBOL(msi_get_region_count); + +int msi_get_region(int region_num, struct msi_region *region) +{ + return arch_msi_get_region(region_num, region); +} +EXPORT_SYMBOL(msi_get_region); + int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { struct msi_desc *entry; diff --git a/include/linux/msi.h b/include/linux/msi.h index b17ead8..0deedb4 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -51,6 +51,18 @@ struct msi_desc { }; /* + * This structure is used to get + * - physical address + * - size + * of a msi region + */ +struct msi_region { + int region_num; /* MSI region number */ + dma_addr_t addr; /* Address of MSI region */ + size_t size; /* Size of MSI region */ +}; + +/* * The arch hooks to setup up msi irqs. Those functions are * implemented as weak symbols so that they /can/ be overriden by * architecture specific code if needed. @@ -64,6 +76,8 @@ void arch_restore_msi_irqs(struct pci_dev *dev, int irq); void default_teardown_msi_irqs(struct pci_dev *dev); void default_restore_msi_irqs(struct pci_dev *dev, int irq); +int arch_msi_get_region_count(void); +int arch_msi_get_region(int region_num, struct msi_region *region); struct msi_chip { struct module *owner;
In Aperture type of IOMMU (like FSL PAMU), VFIO-iommu system need to know the MSI region to map its window in h/w. This patch just defines the required weak functions only and will be used by followup patches. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> --- drivers/pci/msi.c | 22 ++++++++++++++++++++++ include/linux/msi.h | 14 ++++++++++++++ 2 files changed, 36 insertions(+), 0 deletions(-)