From patchwork Wed Oct 23 10:41:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minghuan Lian X-Patchwork-Id: 285633 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id B77FC2C070C for ; Wed, 23 Oct 2013 21:43:56 +1100 (EST) Received: from va3outboundpool.messaging.microsoft.com (va3ehsobe010.messaging.microsoft.com [216.32.180.30]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "MSIT Machine Auth CA 2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 6D50D2C0368 for ; Wed, 23 Oct 2013 21:41:55 +1100 (EST) Received: from mail1-va3-R.bigfish.com (10.7.14.226) by VA3EHSOBE011.bigfish.com (10.7.40.61) with Microsoft SMTP Server id 14.1.225.22; Wed, 23 Oct 2013 10:41:50 +0000 Received: from mail1-va3 (localhost [127.0.0.1]) by mail1-va3-R.bigfish.com (Postfix) with ESMTP id 5E0CE2C0122; Wed, 23 Oct 2013 10:41:50 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: -1 X-BigFish: VS-1(zz154dIzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h17326ah8275bh8275dh1de097h186068hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1155h) Received: from mail1-va3 (localhost.localdomain [127.0.0.1]) by mail1-va3 (MessageSwitch) id 1382524908893473_25167; Wed, 23 Oct 2013 10:41:48 +0000 (UTC) Received: from VA3EHSMHS015.bigfish.com (unknown [10.7.14.244]) by mail1-va3.bigfish.com (Postfix) with ESMTP id CBEDB2400E8; Wed, 23 Oct 2013 10:41:48 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS015.bigfish.com (10.7.99.25) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 23 Oct 2013 10:41:48 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 23 Oct 2013 10:41:48 +0000 Received: from lmh.ap.freescale.net (lmh.ap.freescale.net [10.193.20.65]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r9NAfX76020247; Wed, 23 Oct 2013 03:41:45 -0700 From: Minghuan Lian To: Subject: [PATCH 04/12][v3] pci: fsl: add early PCI indirect access support Date: Wed, 23 Oct 2013 18:41:26 +0800 Message-ID: <1382524894-15164-4-git-send-email-Minghuan.Lian@freescale.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1382524894-15164-1-git-send-email-Minghuan.Lian@freescale.com> References: <1382524894-15164-1-git-send-email-Minghuan.Lian@freescale.com> MIME-Version: 1.0 X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Cc: Minghuan Lian , linux-pci@vger.kernel.org, Zang Roy-R61911 , Bjorn Helgaas , Scott Wood X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16rc2 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The driver needs to read/write PCI configuration very early, at that time architecture-specific PCI controller structure and PCI bus have not been created. The patch provides an interface fsl_arch_fake_pci_bus which should be implemented in architecture-specific PCI driver to fake a PCI controller structure and PCI bus. Using the fake PCI controller and PCI bus, the patch provides the early indirect read/write functions. Signed-off-by: Minghuan Lian --- change log: v1-v3: Derived from http://patchwork.ozlabs.org/patch/278965/ Based on upstream master. Based on the discussion of RFC version here http://patchwork.ozlabs.org/patch/274487/ drivers/pci/host/pci-fsl-common.c | 26 ++++++++++++++++++++++++++ include/linux/fsl/pci-common.h | 7 +++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/pci/host/pci-fsl-common.c b/drivers/pci/host/pci-fsl-common.c index 8bc9a64..505a6a1 100644 --- a/drivers/pci/host/pci-fsl-common.c +++ b/drivers/pci/host/pci-fsl-common.c @@ -204,6 +204,32 @@ static struct pci_ops fsl_indirect_pci_ops = { .write = fsl_indirect_write_config, }; +#define EARLY_FSL_PCI_OP(rw, size, type) \ +int early_fsl_##rw##_config_##size(struct fsl_pci *pci, int bus, \ + int devfn, int offset, type value) \ +{ \ + return pci_bus_##rw##_config_##size(fsl_arch_fake_pci_bus(pci, bus),\ + devfn, offset, value); \ +} + +EARLY_FSL_PCI_OP(read, byte, u8 *) +EARLY_FSL_PCI_OP(read, word, u16 *) +EARLY_FSL_PCI_OP(read, dword, u32 *) +EARLY_FSL_PCI_OP(write, byte, u8) +EARLY_FSL_PCI_OP(write, word, u16) +EARLY_FSL_PCI_OP(write, dword, u32) + +static int early_fsl_find_capability(struct fsl_pci *pci, + int busnr, int devfn, int cap) +{ + struct pci_bus *bus = fsl_arch_fake_pci_bus(pci, busnr); + + if (!bus) + return 0; + + return pci_bus_find_capability(bus, devfn, cap); +} + static int setup_one_atmu(struct ccsr_pci __iomem *pci, unsigned int index, const struct resource *res, resource_size_t offset) diff --git a/include/linux/fsl/pci-common.h b/include/linux/fsl/pci-common.h index 7df4355..a3aca29 100644 --- a/include/linux/fsl/pci-common.h +++ b/include/linux/fsl/pci-common.h @@ -149,5 +149,12 @@ bool fsl_pci_check_link(struct fsl_pci *pci); /* To avoid touching specified devices */ int fsl_arch_pci_exclude_device(struct fsl_pci *pci, u8 bus, u8 devfn); +/* + * To fake a PCI bus + * it is called by early_fsl_*(), at that time the architecture-dependent + * pci controller and pci bus have not been created. + */ +extern struct pci_bus *fsl_arch_fake_pci_bus(struct fsl_pci *pci, int busnr); + #endif /* __PCI_COMMON_H */ #endif /* __KERNEL__ */