From patchwork Tue Oct 22 07:05:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chenfan X-Patchwork-Id: 285371 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A224C2C012D for ; Tue, 22 Oct 2013 18:21:34 +1100 (EST) Received: from localhost ([::1]:43347 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VYWHU-00032Y-8P for incoming@patchwork.ozlabs.org; Tue, 22 Oct 2013 03:21:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55269) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VYWGz-0002yD-5r for qemu-devel@nongnu.org; Tue, 22 Oct 2013 03:21:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VYWGt-00014d-9j for qemu-devel@nongnu.org; Tue, 22 Oct 2013 03:21:01 -0400 Received: from [222.73.24.84] (port=33209 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VYWGs-00013a-9h for qemu-devel@nongnu.org; Tue, 22 Oct 2013 03:20:55 -0400 X-IronPort-AV: E=Sophos;i="4.93,546,1378828800"; d="scan'208";a="8825185" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 22 Oct 2013 15:17:22 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id r9M7Kd1M018699; Tue, 22 Oct 2013 15:20:39 +0800 Received: from G08FNSTD131468.fnst.cn.fujitsu.com ([10.167.226.78]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2013102215055099-2443058 ; Tue, 22 Oct 2013 15:05:50 +0800 From: Chen Fan To: qemu-devel@nongnu.org Date: Tue, 22 Oct 2013 15:05:26 +0800 Message-Id: X-Mailer: git-send-email 1.8.1.4 In-Reply-To: References: X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/10/22 15:05:51, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/10/22 15:18:12, Serialize complete at 2013/10/22 15:18:12 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v1 2/3] Using CPU_FOREACH() instead of scanning local_apics X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org And dropping MAX_APICS cast macro altogether. Signed-off-by: Chen Fan --- hw/intc/apic.c | 82 +++++++++++++++++------------------------ include/hw/i386/apic_internal.h | 2 - 2 files changed, 33 insertions(+), 51 deletions(-) diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 8080e20..fc18600 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -32,8 +32,6 @@ #define SYNC_TO_VAPIC 0x2 #define SYNC_ISR_IRR_TO_VAPIC 0x4 -static APICCommonState *local_apics[MAX_APICS + 1]; - static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode); static void apic_update_irq(APICCommonState *s); static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, @@ -200,18 +198,15 @@ static void apic_external_nmi(APICCommonState *s) #define foreach_apic(apic, deliver_bitmask, code) \ {\ + CPUState *cpu;\ int __i, __j, __mask;\ - for(__i = 0; __i < MAX_APIC_WORDS; __i++) {\ + CPU_FOREACH(cpu) {\ + apic = APIC_COMMON(X86_CPU(cpu)->env.apic_state);\ + __i = apic->idx / 32;\ + __j = apic->idx % 32;\ __mask = deliver_bitmask[__i];\ - if (__mask) {\ - for(__j = 0; __j < 32; __j++) {\ - if (__mask & (1 << __j)) {\ - apic = local_apics[__i * 32 + __j];\ - if (apic) {\ - code;\ - }\ - }\ - }\ + if (__mask & (1 << __j)) {\ + code;\ }\ }\ } @@ -235,9 +230,13 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask, } } if (d >= 0) { - apic_iter = local_apics[d]; - if (apic_iter) { - apic_set_irq(apic_iter, vector_num, trigger_mode); + CPUState *cpu; + CPU_FOREACH(cpu) { + apic_iter = APIC_COMMON(X86_CPU(cpu)->env.apic_state); + if (apic_iter->idx == d) { + apic_set_irq(apic_iter, vector_num, trigger_mode); + break; + } } } } @@ -422,18 +421,14 @@ static void apic_eoi(APICCommonState *s) static int apic_find_dest(uint8_t dest) { - APICCommonState *apic = local_apics[dest]; - int i; - - if (apic && apic->id == dest) - return dest; /* shortcut in case apic->id == apic->idx */ + APICCommonState *apic; + CPUState *cpu; - for (i = 0; i < MAX_APICS; i++) { - apic = local_apics[i]; - if (apic && apic->id == dest) - return i; - if (!apic) - break; + CPU_FOREACH(cpu) { + apic = APIC_COMMON(X86_CPU(cpu)->env.apic_state); + if (apic->id == dest) { + return apic->idx; + } } return -1; @@ -443,7 +438,7 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, uint8_t dest, uint8_t dest_mode) { APICCommonState *apic_iter; - int i; + CPUState *cpu; if (dest_mode == 0) { if (dest == 0xff) { @@ -457,20 +452,17 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, } else { /* XXX: cluster mode */ memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); - for(i = 0; i < MAX_APICS; i++) { - apic_iter = local_apics[i]; - if (apic_iter) { - if (apic_iter->dest_mode == 0xf) { - if (dest & apic_iter->log_dest) - apic_set_bit(deliver_bitmask, i); - } else if (apic_iter->dest_mode == 0x0) { - if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) && - (dest & apic_iter->log_dest & 0x0f)) { - apic_set_bit(deliver_bitmask, i); - } + CPU_FOREACH(cpu) { + apic_iter = APIC_COMMON(X86_CPU(cpu)->env.apic_state); + if (apic_iter->dest_mode == 0xf) { + if (dest & apic_iter->log_dest) { + apic_set_bit(deliver_bitmask, apic_iter->idx); + } + } else if (apic_iter->dest_mode == 0x0) { + if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) && + (dest & apic_iter->log_dest & 0x0f)) { + apic_set_bit(deliver_bitmask, apic_iter->idx); } - } else { - break; } } } @@ -875,20 +867,12 @@ static void apic_realize(DeviceState *dev, Error **errp) { APICCommonState *s = APIC_COMMON(dev); APICCommonClass *acc = APIC_COMMON_GET_CLASS(s); - static int apic_no; - - if (apic_no >= MAX_APICS) { - error_setg(errp, "the new apic number: %d " - "exceeded max apic number", apic_no); - return; - } memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi", APIC_SPACE_SIZE); s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s); - s->idx = apic_no++; - local_apics[s->idx] = s; + s->idx = s->id; msi_supported = true; acc->parent_realize(dev, errp); diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h index 0d775dd..a8b7b46 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -64,8 +64,6 @@ #define VAPIC_ENABLE_BIT 0 #define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT) -#define MAX_APICS 255 - typedef struct APICCommonState APICCommonState; #define TYPE_APIC_COMMON "apic-common"