From patchwork Mon Oct 21 15:05:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benson Leung X-Patchwork-Id: 285222 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 929602C00D1 for ; Tue, 22 Oct 2013 02:06:49 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753965Ab3JUPGp (ORCPT ); Mon, 21 Oct 2013 11:06:45 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:33727 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753861Ab3JUPGC (ORCPT ); Mon, 21 Oct 2013 11:06:02 -0400 Received: by mail-pb0-f46.google.com with SMTP id un1so579934pbc.33 for ; Mon, 21 Oct 2013 08:06:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=buGzZ57MnmyVoG1jkZ53hzTdMYoYrOgI/y8HdBcDuwo=; b=k3jvo+YyO2miMi3tRjHYWCONee0tTEyYDi2A1k8qGqgjXhm8LXHimziuX6rA6Nlrxc VkTR5ChJ0maVphtKXMr4H8FEbJ2Br9d7ijWBuqligJSCCaGY6k1l18SLDvnLsdpcPhCs HdDcQorqgU5r9LZgw9Y/+XudN2/lt6SKSwV54= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=buGzZ57MnmyVoG1jkZ53hzTdMYoYrOgI/y8HdBcDuwo=; b=iFIeK8X36zaRWfLdh/0tZsh9z3gY4fHv5YA6QiIIL5Oa9C/xuEk26cR7pk4UdsM7t+ 6vxrRVFJXFAo0RLJ96J05t2vKprGxFumFVlQPzLbb0L+bRLIAHww9Pa33oubvecyDAi4 S4ECaBGprcm2/AlPuBmqo9DAlylnZ/lVAYh9Wj77RkRv7MLzNCeWl0pov+CW82TVGYQL FQCbthPSXoCWlLvuL0xVuCeNUQoWpts6trxzKd5u0WP0jeY6rKHMZ4uN/oqPjXWxC8EV VoBnH16BlT93z1JcW6LamZ+5eQxX6z/UY3L+zVhAwFz7MTUqAOpSYHe2orSvhpzmaX3O zJtQ== X-Gm-Message-State: ALoCoQkS21+U1KYh4pO6duP+erTnvqWhXF5OowuL1q4YUMi++DkrU5USY6QBX3GoQAisDrP1mrgl X-Received: by 10.68.217.167 with SMTP id oz7mr2114401pbc.188.1382367961977; Mon, 21 Oct 2013 08:06:01 -0700 (PDT) Received: from localhost.localdomain (50-193-42-9-static.hfc.comcastbusiness.net. [50.193.42.9]) by mx.google.com with ESMTPSA id fb3sm21489537pbc.29.2013.10.21.08.06.00 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 21 Oct 2013 08:06:01 -0700 (PDT) From: Benson Leung To: wsa@the-dreams.de, mika.westerberg@linux.intel.com, khali@linux-fr.org, andriy.shevchenko@linux.intel.com, jacmet@sunsite.dk, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: dlaurie@chromium.org, bleung@chromium.org Subject: [PATCH v2 1/2] i2c-designware-pci: Add Haswell ULT device IDs Date: Mon, 21 Oct 2013 08:05:43 -0700 Message-Id: <1382367944-3005-2-git-send-email-bleung@chromium.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1382367944-3005-1-git-send-email-bleung@chromium.org> References: <1382326010-4554-1-git-send-email-bleung@chromium.org> <1382367944-3005-1-git-send-email-bleung@chromium.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Duncan Laurie Add the necessary PCI Device IDs to use the Haswell ULT I2C controller in PCI mode. Set the bus numbers to -1 so it will use dynamic assignment rather than hardcoded. Signed-off-by: Duncan Laurie Signed-off-by: Benson Leung --- v2: Changed Haswell bus_clk to 100Mhz, thanks Mika Westerberg. v1: Initial --- drivers/i2c/busses/i2c-designware-pcidrv.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index f6ed06c..816cbd1 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -54,6 +54,9 @@ enum dw_pci_ctl_id_t { medfield_3, medfield_4, medfield_5, + + haswell_0, + haswell_1, }; struct dw_pci_controller { @@ -132,6 +135,20 @@ static struct dw_pci_controller dw_pci_controllers[] = { .rx_fifo_depth = 32, .clk_khz = 25000, }, + [haswell_0] = { + .bus_num = -1, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 100000, + }, + [haswell_1] = { + .bus_num = -1, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 100000, + }, }; static struct i2c_algorithm i2c_dw_algo = { .master_xfer = i2c_dw_xfer, @@ -321,6 +338,9 @@ static DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = { { PCI_VDEVICE(INTEL, 0x082C), medfield_0 }, { PCI_VDEVICE(INTEL, 0x082D), medfield_1 }, { PCI_VDEVICE(INTEL, 0x082E), medfield_2 }, + /* Haswell ULT */ + { PCI_VDEVICE(INTEL, 0x9c61), haswell_0 }, + { PCI_VDEVICE(INTEL, 0x9c62), haswell_1 }, { 0,} }; MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);