diff mbox

[rs6000] Fix vsx_unpack expansions for endianness

Message ID 1381926126.6275.107.camel@gnopaine
State New
Headers show

Commit Message

Bill Schmidt Oct. 16, 2013, 12:22 p.m. UTC 
For vector unpack operations, the meaning of "high" and "low" is
reversed for little endian.

Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no
regressions.  This fixes one test case for little endian
(gcc.dg/vect/vect-122.c).

Ok for trunk?

Thanks,
Bill


2013-10-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc/config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for
	endianness.
	(vec_unpacks_lo_v4sf): Likewise.
	(vec_unpacks_float_hi_v4si): Likewise.
	(vec_unpacks_float_lo_v4si): Likewise.
	(vec_unpacku_float_hi_v4si): Likewise.
	(vec_unpacku_float_lo_v4si): Likewise.

Comments

David Edelsohn Oct. 16, 2013, 2:17 p.m. UTC | #1 
On Wed, Oct 16, 2013 at 8:22 AM, Bill Schmidt
<wschmidt@linux.vnet.ibm.com> wrote:
> For vector unpack operations, the meaning of "high" and "low" is
> reversed for little endian.
>
> Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no
> regressions.  This fixes one test case for little endian
> (gcc.dg/vect/vect-122.c).
>
> Ok for trunk?
>
> Thanks,
> Bill
>
>
> 2013-10-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
>         * gcc/config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for
>         endianness.
>         (vec_unpacks_lo_v4sf): Likewise.
>         (vec_unpacks_float_hi_v4si): Likewise.
>         (vec_unpacks_float_lo_v4si): Likewise.
>         (vec_unpacku_float_hi_v4si): Likewise.
>         (vec_unpacku_float_lo_v4si): Likewise.

Okay.

Thanks, David
diff mbox

Patch

Index: gcc/config/rs6000/vector.md
===================================================================
--- gcc/config/rs6000/vector.md	(revision 203508)
+++ gcc/config/rs6000/vector.md	(working copy)
@@ -872,7 +872,7 @@ 
 {
   rtx reg = gen_reg_rtx (V4SFmode);
 
-  rs6000_expand_interleave (reg, operands[1], operands[1], true);
+  rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);
   emit_insn (gen_vsx_xvcvspdp (operands[0], reg));
   DONE;
 })
@@ -884,7 +884,7 @@ 
 {
   rtx reg = gen_reg_rtx (V4SFmode);
 
-  rs6000_expand_interleave (reg, operands[1], operands[1], false);
+  rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);
   emit_insn (gen_vsx_xvcvspdp (operands[0], reg));
   DONE;
 })
@@ -896,7 +896,7 @@ 
 {
   rtx reg = gen_reg_rtx (V4SImode);
 
-  rs6000_expand_interleave (reg, operands[1], operands[1], true);
+  rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);
   emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));
   DONE;
 })
@@ -908,7 +908,7 @@ 
 {
   rtx reg = gen_reg_rtx (V4SImode);
 
-  rs6000_expand_interleave (reg, operands[1], operands[1], false);
+  rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);
   emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));
   DONE;
 })
@@ -920,7 +920,7 @@ 
 {
   rtx reg = gen_reg_rtx (V4SImode);
 
-  rs6000_expand_interleave (reg, operands[1], operands[1], true);
+  rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);
   emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));
   DONE;
 })
@@ -932,7 +932,7 @@ 
 {
   rtx reg = gen_reg_rtx (V4SImode);
 
-  rs6000_expand_interleave (reg, operands[1], operands[1], false);
+  rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);
   emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));
   DONE;
 })