From patchwork Wed Oct 16 09:56:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 283910 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-la0-x238.google.com (mail-la0-x238.google.com [IPv6:2a00:1450:4010:c03::238]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 7A8202C035F for ; Wed, 16 Oct 2013 21:00:45 +1100 (EST) Received: by mail-la0-f56.google.com with SMTP id hp15sf32382lab.1 for ; Wed, 16 Oct 2013 03:00:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:list-post:list-help :list-archive:sender:list-subscribe:list-unsubscribe:content-type; bh=2KdVmgrnWQgMpUwWfX7pKwdKTkzsmR3aiUzoQAUt8ys=; b=xASh0nhoGrOqy5unYhFRJH0dQUtriD3BtP3OH0iG5FOe2MQ9Pjr5OKSJdj4zKpciik iQLGtVzoiFj0YiM4MP3WyCOykL4In8m8Uo48Zr+krFxZxV2VSlrkGp4/hls891LxzaJF 2J8R5yWqQxAf2LAT0l/+I+wGSfAInR6TtMYQmsvj3T8qqslQH5vJUVOFBVusLgPuNJXb la7eHspXz42iuN6Eq5NjHB1i3OMjPFsh7peYEwK0G/9Fx79fBA0QNX7L3iPk3KQZFcXz 0lbiR9bPFWFMxo1B5uymfWqTXWY9kDt6nkDSQ7lifdEzGRb19xKeWT7Pcysa+j68A6Z6 c4pg== X-Received: by 10.180.95.6 with SMTP id dg6mr10068wib.4.1381917640449; Wed, 16 Oct 2013 03:00:40 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.180.185.49 with SMTP id ez17ls218686wic.22.gmail; Wed, 16 Oct 2013 03:00:40 -0700 (PDT) X-Received: by 10.180.208.67 with SMTP id mc3mr2889445wic.1.1381917640132; Wed, 16 Oct 2013 03:00:40 -0700 (PDT) Received: from mail-lb0-x22d.google.com (mail-lb0-x22d.google.com [2a00:1450:4010:c04::22d]) by gmr-mx.google.com with ESMTPS id qy6si2294075bkb.3.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 03:00:40 -0700 (PDT) Received-SPF: pass (google.com: domain of jhovold@gmail.com designates 2a00:1450:4010:c04::22d as permitted sender) client-ip=2a00:1450:4010:c04::22d; Received: by mail-lb0-f173.google.com with SMTP id o14so483384lbi.4 for ; Wed, 16 Oct 2013 03:00:39 -0700 (PDT) X-Received: by 10.112.64.7 with SMTP id k7mr744315lbs.43.1381917639781; Wed, 16 Oct 2013 03:00:39 -0700 (PDT) Received: from xi.terra (c193-14-141-227.cust.tele2.se. [193.14.141.227]) by mx.google.com with ESMTPSA id mr1sm50612908lbc.16.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 16 Oct 2013 03:00:38 -0700 (PDT) Received: from johan by xi.terra with local (Exim 4.80.1) (envelope-from ) id 1VWNu8-0005YP-Ii; Wed, 16 Oct 2013 12:00:36 +0200 From: Johan Hovold To: Nicolas Ferre Cc: Jean-Christophe Plagniol-Villard , Andrew Victor , Alessandro Zummo , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, rtc-linux@googlegroups.com, Johan Hovold Subject: [rtc-linux] [PATCH v3 1/3] ARM: at91: fix hanged boot due to early rtc-interrupt Date: Wed, 16 Oct 2013 11:56:14 +0200 Message-Id: <1381917376-21107-2-git-send-email-jhovold@gmail.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1381917376-21107-1-git-send-email-jhovold@gmail.com> References: <1363025279-17615-1-git-send-email-jhovold@gmail.com> <1381917376-21107-1-git-send-email-jhovold@gmail.com> X-Original-Sender: jhovold@gmail.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of jhovold@gmail.com designates 2a00:1450:4010:c04::22d as permitted sender) smtp.mail=jhovold@gmail.com; dkim=pass header.i=@gmail.com; dmarc=pass (p=NONE dis=NONE) header.from=gmail.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , Make sure the RTC-interrupts are masked at boot by adding a new helper function to be used at SOC-init. This fixes hanged boot on all AT91 SOCs with an RTC (but RM9200), for example, after a reset during an RTC-update or if an RTC-alarm goes off after shutdown (e.g. when using RTC wakeup). The RTC and RTT-peripherals are powered by backup power (VDDBU) (on all AT91 SOCs but RM9200) and are not reset on wake-up, user, watchdog or software reset. This means that their interrupts may be enabled during early boot if, for example, they where not disabled during a previous shutdown (e.g. due to a buggy driver or a non-clean shutdown such as a user reset). Furthermore, an RTC or RTT-alarm may also be active. The RTC and RTT-interrupts use the shared system-interrupt line, which is also used by the PIT, and if an interrupt occurs before a handler (e.g. RTC-driver) has been installed this leads to the system interrupt being disabled and prevents the system from booting. Note that when boot hangs due to an early RTC or RTT-interrupt, the only way to get the system to start again is to remove the backup power (e.g. battery) or to disable the interrupt manually from the bootloader. In particular, a user reset is not sufficient. Signed-off-by: Johan Hovold Acked-by: Nicolas Ferre --- arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/at91sam9g45.c | 2 ++ arch/arm/mach-at91/at91sam9n12.c | 6 ++++ arch/arm/mach-at91/at91sam9rl.c | 2 ++ arch/arm/mach-at91/at91sam9x5.c | 6 ++++ arch/arm/mach-at91/generic.h | 1 + arch/arm/mach-at91/include/mach/at91sam9n12.h | 5 +++ arch/arm/mach-at91/include/mach/at91sam9x5.h | 5 +++ arch/arm/mach-at91/include/mach/sama5d3.h | 5 +++ arch/arm/mach-at91/sama5d3.c | 6 ++++ arch/arm/mach-at91/sysirq_mask.c | 47 +++++++++++++++++++++++++++ 11 files changed, 86 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-at91/sysirq_mask.c diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index aa33b0f..8879a41 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel. # -obj-y := irq.o gpio.o setup.o +obj-y := irq.o gpio.o setup.o sysirq_mask.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index b9fe138..8d4da6d 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -379,6 +379,8 @@ static void __init at91sam9g45_initialize(void) arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9g45_restart; + at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); + /* Register GPIO subsystem */ at91_gpio_init(at91sam9g45_gpio, 5); } diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index c7d670d..4d6001c 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -223,7 +223,13 @@ static void __init at91sam9n12_map_io(void) at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); } +static void __init at91sam9n12_initialize(void) +{ + at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC); +} + AT91_SOC_START(at91sam9n12) .map_io = at91sam9n12_map_io, .register_clocks = at91sam9n12_register_clocks, + .init = at91sam9n12_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index d4ec0d9..b5a8c9d 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -294,6 +294,8 @@ static void __init at91sam9rl_initialize(void) arm_pm_idle = at91sam9_idle; arm_pm_restart = at91sam9_alt_restart; + at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); + /* Register GPIO subsystem */ at91_gpio_init(at91sam9rl_gpio, 4); } diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 916e5a1..e8a2e07 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -322,6 +322,11 @@ static void __init at91sam9x5_map_io(void) at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); } +static void __init at91sam9x5_initialize(void) +{ + at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC); +} + /* -------------------------------------------------------------------- * Interrupt initialization * -------------------------------------------------------------------- */ @@ -329,4 +334,5 @@ static void __init at91sam9x5_map_io(void) AT91_SOC_START(at91sam9x5) .map_io = at91sam9x5_map_io, .register_clocks = at91sam9x5_register_clocks, + .init = at91sam9x5_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index dc6e2f5..80269bd 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -34,6 +34,7 @@ extern int __init at91_aic_of_init(struct device_node *node, struct device_node *parent); extern int __init at91_aic5_of_init(struct device_node *node, struct device_node *parent); +extern void __init at91_sysirq_mask_rtc(u32 rtc_base); /* Timer */ diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12.h b/arch/arm/mach-at91/include/mach/at91sam9n12.h index d374b87..0151bcf 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9n12.h +++ b/arch/arm/mach-at91/include/mach/at91sam9n12.h @@ -49,6 +49,11 @@ #define AT91SAM9N12_BASE_USART3 0xf8028000 /* + * System Peripherals + */ +#define AT91SAM9N12_BASE_RTC 0xfffffeb0 + +/* * Internal Memory. */ #define AT91SAM9N12_SRAM_BASE 0x00300000 /* Internal SRAM base address */ diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h index c75ee19..2fc76c4 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9x5.h +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h @@ -55,6 +55,11 @@ #define AT91SAM9X5_BASE_USART2 0xf8024000 /* + * System Peripherals + */ +#define AT91SAM9X5_BASE_RTC 0xfffffeb0 + +/* * Internal Memory. */ #define AT91SAM9X5_SRAM_BASE 0x00300000 /* Internal SRAM base address */ diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h index 31096a8..25613d8 100644 --- a/arch/arm/mach-at91/include/mach/sama5d3.h +++ b/arch/arm/mach-at91/include/mach/sama5d3.h @@ -73,6 +73,11 @@ #define SAMA5D3_BASE_USART3 0xf8024000 /* + * System Peripherals + */ +#define SAMA5D3_BASE_RTC 0xfffffeb0 + +/* * Internal Memory */ #define SAMA5D3_SRAM_BASE 0x00300000 /* Internal SRAM base address */ diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index 4012797..3ea8642 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -371,7 +371,13 @@ static void __init sama5d3_map_io(void) at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); } +static void __init sama5d3_initialize(void) +{ + at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC); +} + AT91_SOC_START(sama5d3) .map_io = sama5d3_map_io, .register_clocks = sama5d3_register_clocks, + .init = sama5d3_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c new file mode 100644 index 0000000..ee3e22c --- /dev/null +++ b/arch/arm/mach-at91/sysirq_mask.c @@ -0,0 +1,47 @@ +/* + * sysirq_mask.c - System-interrupt masking + * + * Copyright (C) 2013 Johan Hovold + * + * Functions to disable system interrupts from backup-powered peripherals. + * + * The RTC and RTT-peripherals are generally powered by backup power (VDDBU) + * and are not reset on wake-up, user, watchdog or software reset. This means + * that their interrupts may be enabled during early boot (e.g. after a user + * reset). + * + * As the RTC and RTT share the system-interrupt line with the PIT, an + * interrupt occurring before a handler has been installed would lead to the + * system interrupt being disabled and prevent the system from booting. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include + +#include "generic.h" + +#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ +#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ + +void __init at91_sysirq_mask_rtc(u32 rtc_base) +{ + void __iomem *base; + u32 mask; + + base = ioremap(rtc_base, 64); + if (!base) + return; + + mask = readl_relaxed(base + AT91_RTC_IMR); + if (mask) { + pr_info("AT91: Disabling rtc irq\n"); + writel_relaxed(mask, base + AT91_RTC_IDR); + (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */ + } + + iounmap(base); +}