| Message ID | 5257F622.8050707@gmail.com |
|---|---|
| State | New |
| Headers | show |
Il 11/10/2013 13:59, Tom Musta ha scritto: > This patch adds the Load VSX Vector Word*4 Indexed (lxvw4x) > instruction. > > V2: changed to use deposit_i64 per Richard Henderson's review. > > Signed-off-by: Tom Musta <tommusta@gmail.com> > --- > target-ppc/translate.c | 29 +++++++++++++++++++++++++++++ > 1 files changed, 29 insertions(+), 0 deletions(-) > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index e5021cf..064cfa1 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -7053,6 +7053,34 @@ static void gen_lxvdsx(DisasContext *ctx) > tcg_temp_free(EA); > } > > +static void gen_lxvw4x(DisasContext *ctx) > +{ > + TCGv EA, tmp; > + TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); > + TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); > + if (unlikely(!ctx->vsx_enabled)) { > + gen_exception(ctx, POWERPC_EXCP_VSXU); > + return; > + } > + gen_set_access_type(ctx, ACCESS_INT); > + EA = tcg_temp_new(); > + tmp = tcg_temp_new(); > + gen_addr_reg_index(ctx, EA); > + gen_qemu_ld32u(ctx, tmp, EA); > + tcg_gen_addi_tl(EA, EA, 4); > + gen_qemu_ld32u(ctx, xth, EA); > + tcg_gen_deposit_i64(xth, xth, tmp, 32, 32); > + > + tcg_gen_addi_tl(EA, EA, 4); > + gen_qemu_ld32u(ctx, tmp, EA); > + tcg_gen_addi_tl(EA, EA, 4); > + gen_qemu_ld32u(ctx, xtl, EA); > + tcg_gen_deposit_i64(xtl, xtl, tmp, 32, 32); > + > + tcg_temp_free(EA); > + tcg_temp_free(tmp); > +} > + > static void gen_stxvd2x(DisasContext *ctx) > { > TCGv EA; > @@ -9551,6 +9579,7 @@ GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23), > GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX), > GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX), > +GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), > > GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e5021cf..064cfa1 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7053,6 +7053,34 @@ static void gen_lxvdsx(DisasContext *ctx) tcg_temp_free(EA); } +static void gen_lxvw4x(DisasContext *ctx) +{ + TCGv EA, tmp; + TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); + TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + tmp = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + gen_qemu_ld32u(ctx, tmp, EA); + tcg_gen_addi_tl(EA, EA, 4); + gen_qemu_ld32u(ctx, xth, EA); + tcg_gen_deposit_i64(xth, xth, tmp, 32, 32); + + tcg_gen_addi_tl(EA, EA, 4); + gen_qemu_ld32u(ctx, tmp, EA); + tcg_gen_addi_tl(EA, EA, 4); + gen_qemu_ld32u(ctx, xtl, EA); + tcg_gen_deposit_i64(xtl, xtl, tmp, 32, 32); + + tcg_temp_free(EA); + tcg_temp_free(tmp); +} + static void gen_stxvd2x(DisasContext *ctx) { TCGv EA; @@ -9551,6 +9579,7 @@ GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23), GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX), +GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX),
This patch adds the Load VSX Vector Word*4 Indexed (lxvw4x) instruction. V2: changed to use deposit_i64 per Richard Henderson's review. Signed-off-by: Tom Musta <tommusta@gmail.com> --- target-ppc/translate.c | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-)