From patchwork Fri Oct 11 06:49:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 282534 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 267632C011C for ; Fri, 11 Oct 2013 17:49:54 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756884Ab3JKGtw (ORCPT ); Fri, 11 Oct 2013 02:49:52 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:36953 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756863Ab3JKGtv (ORCPT ); Fri, 11 Oct 2013 02:49:51 -0400 Received: from 172.24.2.119 (EHLO szxeml213-edg.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id BJB51391; Fri, 11 Oct 2013 14:49:48 +0800 (CST) Received: from SZXEML409-HUB.china.huawei.com (10.82.67.136) by szxeml213-edg.china.huawei.com (172.24.2.30) with Microsoft SMTP Server (TLS) id 14.3.146.0; Fri, 11 Oct 2013 14:49:44 +0800 Received: from localhost (10.135.76.69) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.146.0; Fri, 11 Oct 2013 14:49:35 +0800 From: Yijing Wang To: Benjamin Herrenschmidt , Bjorn Helgaas CC: , Yijing Wang , "Hanjun Guo" , Gavin Shan , "Paul Mackerras" Subject: [PATCH v3] powerpc/pci: use pci_is_pcie() to simplify code Date: Fri, 11 Oct 2013 14:49:31 +0800 Message-ID: <1381474171-11072-1-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Use pci_is_pcie() to simplify code. Signed-off-by: Yijing Wang Signed-off-by: Bjorn Helgaas Acked-by: Kumar Gala Reviewed-by: Gavin Shan Cc: Gavin Shan Cc: Benjamin Herrenschmidt Cc: Paul Mackerras --- v2->v3: use dev->pcie_cap instead of "cap" in eeh_ops->read_config() "cap" is stale after remove PCIe Cap find code. Point out by Benjamin Herrenschmidt. --- arch/powerpc/kernel/eeh.c | 5 ++--- arch/powerpc/sysdev/fsl_pci.c | 2 +- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c index 55593ee..db86f97 100644 --- a/arch/powerpc/kernel/eeh.c +++ b/arch/powerpc/kernel/eeh.c @@ -189,14 +189,13 @@ static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len) } /* If PCI-E capable, dump PCI-E cap 10, and the AER */ - cap = pci_find_capability(dev, PCI_CAP_ID_EXP); - if (cap) { + if (pci_is_pcie(dev)) { n += scnprintf(buf+n, len-n, "pci-e cap10:\n"); printk(KERN_WARNING "EEH: PCI-E capabilities and status follow:\n"); for (i=0; i<=8; i++) { - eeh_ops->read_config(dn, cap+4*i, 4, &cfg); + eeh_ops->read_config(dn, dev->pcie_cap+4*i, 4, &cfg); n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); printk(KERN_WARNING "EEH: PCI-E %02x: %08x\n", i, cfg); } diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index ccfb50d..92e7258 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -45,7 +45,7 @@ static void quirk_fsl_pcie_header(struct pci_dev *dev) u8 hdr_type; /* if we aren't a PCIe don't bother */ - if (!pci_find_capability(dev, PCI_CAP_ID_EXP)) + if (!pci_is_pcie(dev)) return; /* if we aren't in host mode don't bother */