Patchwork [1/2] PCI: imx6: Make reset-gpio optional

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Submitter Marek Vasut
Date Oct. 11, 2013, 2:12 a.m.
Message ID <1381457552-6575-1-git-send-email-marex@denx.de>
Download mbox | patch
Permalink /patch/282511/
State Superseded
Headers show

Comments

Marek Vasut - Oct. 11, 2013, 2:12 a.m.
Some boards do not have a PCIe reset GPIO. To avoid probe
failure on these boards, make the reset GPIO optional as
well.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Frank Li <lznuaa@gmail.com>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)
Jingoo Han - Oct. 11, 2013, 7:09 a.m.
On Friday, October 11, 2013 11:13 AM, Marek Vasut wrote:
> 
> Some boards do not have a PCIe reset GPIO. To avoid probe
> failure on these boards, make the reset GPIO optional as
> well.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Frank Li <lznuaa@gmail.com>
> Cc: Richard Zhu <r65037@freescale.com>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Sean Cross <xobs@kosagi.com>
> Cc: Shawn Guo <shawn.guo@linaro.org>
> Cc: Tim Harvey <tharvey@gateworks.com>
> Cc: Yinghai Lu <yinghai@kernel.org>

Reviewed-by: Jingoo Han <jg1.han@samsung.com>

Best regards,
Jingoo Han

> ---
>  drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
>  1 file changed, 15 insertions(+), 14 deletions(-)

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Shawn Guo - Oct. 12, 2013, 7:20 a.m.
On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:
> Some boards do not have a PCIe reset GPIO. To avoid probe
> failure on these boards, make the reset GPIO optional as
> well.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Frank Li <lznuaa@gmail.com>
> Cc: Richard Zhu <r65037@freescale.com>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Sean Cross <xobs@kosagi.com>
> Cc: Shawn Guo <shawn.guo@linaro.org>
> Cc: Tim Harvey <tharvey@gateworks.com>
> Cc: Yinghai Lu <yinghai@kernel.org>
> ---
>  drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
>  1 file changed, 15 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> index d3639aa..8e7adce 100644
> --- a/drivers/pci/host/pci-imx6.c
> +++ b/drivers/pci/host/pci-imx6.c
> @@ -220,9 +220,12 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
>  	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
>  			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
>  
> -	gpio_set_value(imx6_pcie->reset_gpio, 0);
> -	msleep(100);
> -	gpio_set_value(imx6_pcie->reset_gpio, 1);
> +	/* Some boards don't have PCIe reset GPIO. */
> +	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> +		gpio_set_value(imx6_pcie->reset_gpio, 0);
> +		msleep(100);
> +		gpio_set_value(imx6_pcie->reset_gpio, 1);
> +	}
>  
>  	return 0;
>  }
> @@ -447,17 +450,15 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
>  
>  	/* Fetch GPIOs */
>  	imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
> -	if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
> -		dev_err(&pdev->dev, "no reset-gpio defined\n");
> -		ret = -ENODEV;
> -	}

The 'reset-gpio' is documented as a required property in bindings doc
Documentation/devicetree/bindings/pci/designware-pcie.txt.  You need
to update bindings doc if you turn it into an optional property.

Shawn

> -	ret = devm_gpio_request_one(&pdev->dev,
> -				imx6_pcie->reset_gpio,
> -				GPIOF_OUT_INIT_LOW,
> -				"PCIe reset");
> -	if (ret) {
> -		dev_err(&pdev->dev, "unable to get reset gpio\n");
> -		goto err;
> +	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> +		ret = devm_gpio_request_one(&pdev->dev,
> +					imx6_pcie->reset_gpio,
> +					GPIOF_OUT_INIT_LOW,
> +					"PCIe reset");
> +		if (ret) {
> +			dev_err(&pdev->dev, "unable to get reset gpio\n");
> +			goto err;
> +		}
>  	}
>  
>  	imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0);
> -- 
> 1.8.4.rc3
> 

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Marek Vasut - Oct. 12, 2013, 9:28 a.m.
Dear Shawn Guo,

> On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:
> > Some boards do not have a PCIe reset GPIO. To avoid probe
> > failure on these boards, make the reset GPIO optional as
> > well.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Frank Li <lznuaa@gmail.com>
> > Cc: Richard Zhu <r65037@freescale.com>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Sean Cross <xobs@kosagi.com>
> > Cc: Shawn Guo <shawn.guo@linaro.org>
> > Cc: Tim Harvey <tharvey@gateworks.com>
> > Cc: Yinghai Lu <yinghai@kernel.org>
> > ---
> > 
> >  drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
> >  1 file changed, 15 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> > index d3639aa..8e7adce 100644
> > --- a/drivers/pci/host/pci-imx6.c
> > +++ b/drivers/pci/host/pci-imx6.c
> > @@ -220,9 +220,12 @@ static int imx6_pcie_assert_core_reset(struct
> > pcie_port *pp)
> > 
> >  	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> >  	
> >  			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
> > 
> > -	gpio_set_value(imx6_pcie->reset_gpio, 0);
> > -	msleep(100);
> > -	gpio_set_value(imx6_pcie->reset_gpio, 1);
> > +	/* Some boards don't have PCIe reset GPIO. */
> > +	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> > +		gpio_set_value(imx6_pcie->reset_gpio, 0);
> > +		msleep(100);
> > +		gpio_set_value(imx6_pcie->reset_gpio, 1);
> > +	}
> > 
> >  	return 0;
> >  
> >  }
> > 
> > @@ -447,17 +450,15 @@ static int __init imx6_pcie_probe(struct
> > platform_device *pdev)
> > 
> >  	/* Fetch GPIOs */
> >  	imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
> > 
> > -	if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
> > -		dev_err(&pdev->dev, "no reset-gpio defined\n");
> > -		ret = -ENODEV;
> > -	}
> 
> The 'reset-gpio' is documented as a required property in bindings doc
> Documentation/devicetree/bindings/pci/designware-pcie.txt.  You need
> to update bindings doc if you turn it into an optional property.

That's true, thanks for pointing it out!
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Jingoo Han - Oct. 14, 2013, 12:02 a.m.
On Saturday, October 12, 2013 6:29 PM, Marek Vasut wrote:
> > On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:
> > > Some boards do not have a PCIe reset GPIO. To avoid probe
> > > failure on these boards, make the reset GPIO optional as
> > > well.
> > >
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > Cc: Frank Li <lznuaa@gmail.com>
> > > Cc: Richard Zhu <r65037@freescale.com>
> > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > Cc: Sean Cross <xobs@kosagi.com>
> > > Cc: Shawn Guo <shawn.guo@linaro.org>
> > > Cc: Tim Harvey <tharvey@gateworks.com>
> > > Cc: Yinghai Lu <yinghai@kernel.org>
> > > ---
> > >
> > >  drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
> > >  1 file changed, 15 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
> > > index d3639aa..8e7adce 100644
> > > --- a/drivers/pci/host/pci-imx6.c
> > > +++ b/drivers/pci/host/pci-imx6.c
> > > @@ -220,9 +220,12 @@ static int imx6_pcie_assert_core_reset(struct
> > > pcie_port *pp)
> > >
> > >  	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > >
> > >  			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
> > >
> > > -	gpio_set_value(imx6_pcie->reset_gpio, 0);
> > > -	msleep(100);
> > > -	gpio_set_value(imx6_pcie->reset_gpio, 1);
> > > +	/* Some boards don't have PCIe reset GPIO. */
> > > +	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> > > +		gpio_set_value(imx6_pcie->reset_gpio, 0);
> > > +		msleep(100);
> > > +		gpio_set_value(imx6_pcie->reset_gpio, 1);
> > > +	}
> > >
> > >  	return 0;
> > >
> > >  }
> > >
> > > @@ -447,17 +450,15 @@ static int __init imx6_pcie_probe(struct
> > > platform_device *pdev)
> > >
> > >  	/* Fetch GPIOs */
> > >  	imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
> > >
> > > -	if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
> > > -		dev_err(&pdev->dev, "no reset-gpio defined\n");
> > > -		ret = -ENODEV;
> > > -	}
> >
> > The 'reset-gpio' is documented as a required property in bindings doc
> > Documentation/devicetree/bindings/pci/designware-pcie.txt.  You need
> > to update bindings doc if you turn it into an optional property.
> 
> That's true, thanks for pointing it out!

+cc Kishon Vijay Abraham I, Pratyush Anand, Mohit KUMAR

Yes, right.
"reset-gpio" property can be moved to an optional property.
Also, the patch to fix 'Designware' part such as 'designware-pcie.txt'
can be shared with other related people as below.

  - Samsung Exynos PCIe: Jingoo Han
  - ST Spear PCIe: Pratyush Anand, Mohit KUMAR
  - TI OMAP PCIe: Kishon Vijay Abraham I

Best regards,
Jingoo Han

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Marek Vasut - Oct. 14, 2013, 12:44 a.m.
Hello Han,

> On Saturday, October 12, 2013 6:29 PM, Marek Vasut wrote:
> > > On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:
> > > > Some boards do not have a PCIe reset GPIO. To avoid probe
> > > > failure on these boards, make the reset GPIO optional as
> > > > well.
> > > > 
> > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > > Cc: Frank Li <lznuaa@gmail.com>
> > > > Cc: Richard Zhu <r65037@freescale.com>
> > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > Cc: Sean Cross <xobs@kosagi.com>
> > > > Cc: Shawn Guo <shawn.guo@linaro.org>
> > > > Cc: Tim Harvey <tharvey@gateworks.com>
> > > > Cc: Yinghai Lu <yinghai@kernel.org>
> > > > ---
> > > > 
> > > >  drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
> > > >  1 file changed, 15 insertions(+), 14 deletions(-)
> > > > 
> > > > diff --git a/drivers/pci/host/pci-imx6.c
> > > > b/drivers/pci/host/pci-imx6.c index d3639aa..8e7adce 100644
> > > > --- a/drivers/pci/host/pci-imx6.c
> > > > +++ b/drivers/pci/host/pci-imx6.c
> > > > @@ -220,9 +220,12 @@ static int imx6_pcie_assert_core_reset(struct
> > > > pcie_port *pp)
> > > > 
> > > >  	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > > >  	
> > > >  			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
> > > > 
> > > > -	gpio_set_value(imx6_pcie->reset_gpio, 0);
> > > > -	msleep(100);
> > > > -	gpio_set_value(imx6_pcie->reset_gpio, 1);
> > > > +	/* Some boards don't have PCIe reset GPIO. */
> > > > +	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> > > > +		gpio_set_value(imx6_pcie->reset_gpio, 0);
> > > > +		msleep(100);
> > > > +		gpio_set_value(imx6_pcie->reset_gpio, 1);
> > > > +	}
> > > > 
> > > >  	return 0;
> > > >  
> > > >  }
> > > > 
> > > > @@ -447,17 +450,15 @@ static int __init imx6_pcie_probe(struct
> > > > platform_device *pdev)
> > > > 
> > > >  	/* Fetch GPIOs */
> > > >  	imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
> > > > 
> > > > -	if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
> > > > -		dev_err(&pdev->dev, "no reset-gpio defined\n");
> > > > -		ret = -ENODEV;
> > > > -	}
> > > 
> > > The 'reset-gpio' is documented as a required property in bindings doc
> > > Documentation/devicetree/bindings/pci/designware-pcie.txt.  You need
> > > to update bindings doc if you turn it into an optional property.
> > 
> > That's true, thanks for pointing it out!
> 
> +cc Kishon Vijay Abraham I, Pratyush Anand, Mohit KUMAR
> 
> Yes, right.
> "reset-gpio" property can be moved to an optional property.
> Also, the patch to fix 'Designware' part such as 'designware-pcie.txt'
> can be shared with other related people as below.
> 
>   - Samsung Exynos PCIe: Jingoo Han
>   - ST Spear PCIe: Pratyush Anand, Mohit KUMAR
>   - TI OMAP PCIe: Kishon Vijay Abraham I

I'm in the process of rebasing the patches on top of next 2013-10-10. Right now 
I'm getting a crash in __write_msi_msg() when my Intel "igb" reports "enabling 
bus mastering" . Any quick idea? Seems like this MSI support is new in the pcie-
designware.c .

I'll just start plumbing to see what it is.

Best regards,
Marek Vasut
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Marek Vasut - Oct. 14, 2013, 1:17 a.m.
Hello Han,

> > On Saturday, October 12, 2013 6:29 PM, Marek Vasut wrote:
> > > > On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:
> > > > > Some boards do not have a PCIe reset GPIO. To avoid probe
> > > > > failure on these boards, make the reset GPIO optional as
> > > > > well.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > > > Cc: Frank Li <lznuaa@gmail.com>
> > > > > Cc: Richard Zhu <r65037@freescale.com>
> > > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > > Cc: Sean Cross <xobs@kosagi.com>
> > > > > Cc: Shawn Guo <shawn.guo@linaro.org>
> > > > > Cc: Tim Harvey <tharvey@gateworks.com>
> > > > > Cc: Yinghai Lu <yinghai@kernel.org>
> > > > > ---
> > > > > 
> > > > >  drivers/pci/host/pci-imx6.c | 29 +++++++++++++++--------------
> > > > >  1 file changed, 15 insertions(+), 14 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/pci/host/pci-imx6.c
> > > > > b/drivers/pci/host/pci-imx6.c index d3639aa..8e7adce 100644
> > > > > --- a/drivers/pci/host/pci-imx6.c
> > > > > +++ b/drivers/pci/host/pci-imx6.c
> > > > > @@ -220,9 +220,12 @@ static int imx6_pcie_assert_core_reset(struct
> > > > > pcie_port *pp)
> > > > > 
> > > > >  	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
> > > > >  	
> > > > >  			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
> > > > > 
> > > > > -	gpio_set_value(imx6_pcie->reset_gpio, 0);
> > > > > -	msleep(100);
> > > > > -	gpio_set_value(imx6_pcie->reset_gpio, 1);
> > > > > +	/* Some boards don't have PCIe reset GPIO. */
> > > > > +	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
> > > > > +		gpio_set_value(imx6_pcie->reset_gpio, 0);
> > > > > +		msleep(100);
> > > > > +		gpio_set_value(imx6_pcie->reset_gpio, 1);
> > > > > +	}
> > > > > 
> > > > >  	return 0;
> > > > >  
> > > > >  }
> > > > > 
> > > > > @@ -447,17 +450,15 @@ static int __init imx6_pcie_probe(struct
> > > > > platform_device *pdev)
> > > > > 
> > > > >  	/* Fetch GPIOs */
> > > > >  	imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
> > > > > 
> > > > > -	if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
> > > > > -		dev_err(&pdev->dev, "no reset-gpio defined\n");
> > > > > -		ret = -ENODEV;
> > > > > -	}
> > > > 
> > > > The 'reset-gpio' is documented as a required property in bindings doc
> > > > Documentation/devicetree/bindings/pci/designware-pcie.txt.  You need
> > > > to update bindings doc if you turn it into an optional property.
> > > 
> > > That's true, thanks for pointing it out!
> > 
> > +cc Kishon Vijay Abraham I, Pratyush Anand, Mohit KUMAR
> > 
> > Yes, right.
> > "reset-gpio" property can be moved to an optional property.
> > Also, the patch to fix 'Designware' part such as 'designware-pcie.txt'
> > can be shared with other related people as below.
> > 
> >   - Samsung Exynos PCIe: Jingoo Han
> >   - ST Spear PCIe: Pratyush Anand, Mohit KUMAR
> >   - TI OMAP PCIe: Kishon Vijay Abraham I
> 
> I'm in the process of rebasing the patches on top of next 2013-10-10. Right
> now I'm getting a crash in __write_msi_msg() when my Intel "igb" reports
> "enabling bus mastering" . Any quick idea? Seems like this MSI support is
> new in the pcie- designware.c .
> 
> I'll just start plumbing to see what it is.

Looks like irq_alloc_descs() return -EEXIST for me in assign_irq() . Noone 
checks the return value of it , so it can fail later on ;-) Now, why does it 
return -EEXIST in the first place? I'm sure someone more experienced with PCI 
would know right away .
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Jingoo Han - Oct. 14, 2013, 2:33 a.m.
On Monday, October 14, 2013 10:18 AM, Marek Vasut wrote:
> > > On Saturday, October 12, 2013 6:29 PM, Marek Vasut wrote:
> > > > > On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:

[.....]

> > > +cc Kishon Vijay Abraham I, Pratyush Anand, Mohit KUMAR
> > >
> > > Yes, right.
> > > "reset-gpio" property can be moved to an optional property.
> > > Also, the patch to fix 'Designware' part such as 'designware-pcie.txt'
> > > can be shared with other related people as below.
> > >
> > >   - Samsung Exynos PCIe: Jingoo Han
> > >   - ST Spear PCIe: Pratyush Anand, Mohit KUMAR
> > >   - TI OMAP PCIe: Kishon Vijay Abraham I
> >
> > I'm in the process of rebasing the patches on top of next 2013-10-10. Right
> > now I'm getting a crash in __write_msi_msg() when my Intel "igb" reports
> > "enabling bus mastering" . Any quick idea? Seems like this MSI support is
> > new in the pcie- designware.c .
> >
> > I'll just start plumbing to see what it is.
> 
> Looks like irq_alloc_descs() return -EEXIST for me in assign_irq() . Noone
> checks the return value of it , so it can fail later on ;-) Now, why does it
> return -EEXIST in the first place? I'm sure someone more experienced with PCI
> would know right away .

Hi Marek,

How about applying the following patch, which was made by Pratyush Anand? :-)
I am not sure; however, the patch resolved some problems that were found on
OMAP PCIe and Exynos PCIe, when MSI is enabled.

"PCI: designware: Add irq_create_mapping()"

http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/host-exynos&id=904d0e7889933fb48d921c998fd1cabb3a9d6635

Best regards,
Jingoo Han

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Marek Vasut - Oct. 14, 2013, 3:23 a.m.
Hello Han,

> On Monday, October 14, 2013 10:18 AM, Marek Vasut wrote:
> > > > On Saturday, October 12, 2013 6:29 PM, Marek Vasut wrote:
> > > > > > On Fri, Oct 11, 2013 at 04:12:31AM +0200, Marek Vasut wrote:
> [.....]
> 
> > > > +cc Kishon Vijay Abraham I, Pratyush Anand, Mohit KUMAR
> > > > 
> > > > Yes, right.
> > > > "reset-gpio" property can be moved to an optional property.
> > > > Also, the patch to fix 'Designware' part such as
> > > > 'designware-pcie.txt' can be shared with other related people as
> > > > below.
> > > > 
> > > >   - Samsung Exynos PCIe: Jingoo Han
> > > >   - ST Spear PCIe: Pratyush Anand, Mohit KUMAR
> > > >   - TI OMAP PCIe: Kishon Vijay Abraham I
> > > 
> > > I'm in the process of rebasing the patches on top of next 2013-10-10.
> > > Right now I'm getting a crash in __write_msi_msg() when my Intel "igb"
> > > reports "enabling bus mastering" . Any quick idea? Seems like this MSI
> > > support is new in the pcie- designware.c .
> > > 
> > > I'll just start plumbing to see what it is.
> > 
> > Looks like irq_alloc_descs() return -EEXIST for me in assign_irq() .
> > Noone checks the return value of it , so it can fail later on ;-) Now,
> > why does it return -EEXIST in the first place? I'm sure someone more
> > experienced with PCI would know right away .
> 
> Hi Marek,
> 
> How about applying the following patch, which was made by Pratyush Anand?
> :-) I am not sure; however, the patch resolved some problems that were
> found on OMAP PCIe and Exynos PCIe, when MSI is enabled.
> 
> "PCI: designware: Add irq_create_mapping()"
> 
> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/h
> ost-exynos&id=904d0e7889933fb48d921c998fd1cabb3a9d6635

Wow, thanks! I'll check it once I get some sleep, I've been at it for too long 
now.

btw. do you happen to have any idea why would the whole system freeze when I do 
"ifconfig up" on my PCIe-connected intel i210 ethernet adapter (driven by the 
"igb" driver)? It seems that upon reception or transmission of a single packet, 
the whole system freezes to a point where not even JTAG can break (halt) the CPU 
so I can figure out what the problem is. Interestingly enough, the whole probe 
routine of the "igb" driver finishes correctly, the hard-freeze only happens 
shortly after I see that the link is up. Any new ideas on why this might happen 
would be really helpful. Just for completeness, it seems Tim has the same issue 
on Marvell Yucon card (sky2 driver).

Thank you for your help again!

Best regards,
Marek Vasut
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Patch

diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index d3639aa..8e7adce 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -220,9 +220,12 @@  static int imx6_pcie_assert_core_reset(struct pcie_port *pp)
 	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
 			IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
 
-	gpio_set_value(imx6_pcie->reset_gpio, 0);
-	msleep(100);
-	gpio_set_value(imx6_pcie->reset_gpio, 1);
+	/* Some boards don't have PCIe reset GPIO. */
+	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
+		gpio_set_value(imx6_pcie->reset_gpio, 0);
+		msleep(100);
+		gpio_set_value(imx6_pcie->reset_gpio, 1);
+	}
 
 	return 0;
 }
@@ -447,17 +450,15 @@  static int __init imx6_pcie_probe(struct platform_device *pdev)
 
 	/* Fetch GPIOs */
 	imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
-	if (!gpio_is_valid(imx6_pcie->reset_gpio)) {
-		dev_err(&pdev->dev, "no reset-gpio defined\n");
-		ret = -ENODEV;
-	}
-	ret = devm_gpio_request_one(&pdev->dev,
-				imx6_pcie->reset_gpio,
-				GPIOF_OUT_INIT_LOW,
-				"PCIe reset");
-	if (ret) {
-		dev_err(&pdev->dev, "unable to get reset gpio\n");
-		goto err;
+	if (gpio_is_valid(imx6_pcie->reset_gpio)) {
+		ret = devm_gpio_request_one(&pdev->dev,
+					imx6_pcie->reset_gpio,
+					GPIOF_OUT_INIT_LOW,
+					"PCIe reset");
+		if (ret) {
+			dev_err(&pdev->dev, "unable to get reset gpio\n");
+			goto err;
+		}
 	}
 
 	imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0);