Patchwork [06/13] Add stxvw4x

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Submitter Tom Musta
Date Oct. 4, 2013, 1:18 p.m.
Message ID <524EC03D.4060402@gmail.com>
Download mbox | patch
Permalink /patch/280621/
State New
Headers show

Comments

Tom Musta - Oct. 4, 2013, 1:18 p.m.
This patch adds the Store VSX Vector Word*4 Indexed (stxvw4x)
instruction.

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
  target-ppc/translate.c |   28 ++++++++++++++++++++++++++++
  1 files changed, 28 insertions(+), 0 deletions(-)

  #define GEN_XX3FORM_DM(name, opc2, opc3) \

Patch

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index a4e3a0a..7d71fb9 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7113,6 +7113,33 @@  static void gen_stxvd2x(DisasContext *ctx)
      tcg_temp_free(EA);
  }

+static void gen_stxvw4x(DisasContext *ctx)
+{
+    TCGv EA, tmp;
+    if (unlikely(!ctx->vsx_enabled)) {
+        gen_exception(ctx, POWERPC_EXCP_VSXU);
+        return;
+    }
+    gen_set_access_type(ctx, ACCESS_INT);
+    EA = tcg_temp_new();
+    gen_addr_reg_index(ctx, EA);
+    tmp = tcg_temp_new();
+
+    tcg_gen_shri_i64(tmp, cpu_vsrh(xS(ctx->opcode)), 32);
+    gen_qemu_st32(ctx, tmp, EA);
+    tcg_gen_addi_tl(EA, EA, 4);
+    gen_qemu_st32(ctx, cpu_vsrh(xS(ctx->opcode)), EA);
+
+    tcg_gen_shri_i64(tmp, cpu_vsrl(xS(ctx->opcode)), 32);
+    tcg_gen_addi_tl(EA, EA, 4);
+    gen_qemu_st32(ctx, tmp, EA);
+    tcg_gen_addi_tl(EA, EA, 4);
+    gen_qemu_st32(ctx, cpu_vsrl(xS(ctx->opcode)), EA);
+
+    tcg_temp_free(EA);
+    tcg_temp_free(tmp);
+}
+
  static void gen_xxpermdi(DisasContext *ctx)
  {
      if (unlikely(!ctx->vsx_enabled)) {
@@ -9588,6 +9615,7 @@  GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, 
PPC_NONE, PPC2_VSX),

  GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX),
  GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX),
+GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX),

  #undef GEN_XX3FORM_DM