From patchwork Fri Oct 4 13:26:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Musta X-Patchwork-Id: 280616 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D32BC2C0099 for ; Fri, 4 Oct 2013 23:53:20 +1000 (EST) Received: from localhost ([::1]:48124 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VS5ok-0002Sp-Vn for incoming@patchwork.ozlabs.org; Fri, 04 Oct 2013 09:53:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58186) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VS5Ov-0001YX-Iq for qemu-devel@nongnu.org; Fri, 04 Oct 2013 09:26:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VS5On-0006vA-02 for qemu-devel@nongnu.org; Fri, 04 Oct 2013 09:26:37 -0400 Received: from mail-oa0-x232.google.com ([2607:f8b0:4003:c02::232]:54043) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VS5OV-0006Wf-Lw; Fri, 04 Oct 2013 09:26:11 -0400 Received: by mail-oa0-f50.google.com with SMTP id j1so3941710oag.9 for ; Fri, 04 Oct 2013 06:26:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=ebM1nY+HRAlcB8wNAfgxo5QhfyKhQWt7o2/2S1FtAj4=; b=avYWI5SxU17QdewK0kxoLp71RijVKPRpiWZr2WjMZho0wQnvLunE/aehaS0Tv/LtSO YHyB83DtVgEajWynQGC3E3K2fkw6TFAM1q5Zk6umPjBkTiqO5ON0hO3YQCigkpLNx2p6 NhcrVvb5wDMRL0XRy01MslvJt4L/qSF4A1ohWdMiaFYAmnN0WSLXPqHG2WioKEwnjZnN YBi3TU4NnjXB2b942mOC6gsRLYK0dBGPIpY7Q9cTyk4PfF2PovnHxmoyF81T8L3oKF4W P+j3C6bW4u2XZM8D4CJvE7hwfSV6QLqkXwk5t3qmvrceaFC2MFQziRSHKFEWguFsuDK0 POoA== X-Received: by 10.60.52.81 with SMTP id r17mr22070519oeo.3.1380893170961; Fri, 04 Oct 2013 06:26:10 -0700 (PDT) Received: from [9.10.80.128] (rchp4.rochester.ibm.com. [129.42.161.36]) by mx.google.com with ESMTPSA id d3sm30176780oek.5.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 04 Oct 2013 06:26:10 -0700 (PDT) Message-ID: <524EC1ED.3040201@gmail.com> Date: Fri, 04 Oct 2013 08:26:05 -0500 From: Tom Musta User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:17.0) Gecko/20130801 Thunderbird/17.0.8 MIME-Version: 1.0 To: qemu-ppc@nongnu.org References: <524EBE04.8050207@gmail.com> In-Reply-To: <524EBE04.8050207@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c02::232 X-Mailman-Approved-At: Fri, 04 Oct 2013 09:52:38 -0400 Cc: Tom Musta , qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH 12/13] Add xxspltw X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds the VSX Splat Word (xxsplatw) instruction. This is the first instruction to use the UIM immediate field and consequently a decoder is also added. Signed-off-by: Tom Musta --- target-ppc/translate.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 50 insertions(+), 0 deletions(-) @@ -7364,6 +7365,54 @@ static void gen_xxsel(DisasContext * ctx) tcg_temp_free(c); } +static void gen_xxspltw(DisasContext *ctx) +{ + TCGv_i64 b, b2; + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + + b = tcg_temp_new(); + b2 = tcg_temp_new(); + + tcg_gen_mov_i64(b, cpu_vsrh(xB(ctx->opcode))); + + switch (UIM(ctx->opcode)) { + case 0: { + tcg_gen_mov_i64(b, cpu_vsrh(xB(ctx->opcode))); + tcg_gen_andi_i64(b, b, 0xFFFFFFFF00000000ul); + tcg_gen_shri_i64(b, b, 32); + break; + } + case 1: { + tcg_gen_mov_i64(b, cpu_vsrh(xB(ctx->opcode))); + tcg_gen_andi_i64(b, b, 0x00000000FFFFFFFFul); + break; + } + case 2: { + tcg_gen_mov_i64(b, cpu_vsrl(xB(ctx->opcode))); + tcg_gen_andi_i64(b, b, 0xFFFFFFFF00000000ul); + tcg_gen_shri_i64(b, b, 32); + break; + } + case 3: { + tcg_gen_mov_i64(b, cpu_vsrl(xB(ctx->opcode))); + tcg_gen_andi_i64(b, b, 0x00000000FFFFFFFFul); + break; + } + } + + tcg_gen_shli_i64(b2, b, 32); + tcg_gen_or_i64(b, b, b2); + + tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), b); + tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), b); + + tcg_temp_free(b); + tcg_temp_free(b2); +} + /*** SPE extension ***/ /* Register moves */ @@ -9879,6 +9928,7 @@ VSX_LOGICAL(xxlxor, 0x8, 0x13, PPC2_VSX), VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX), GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX), GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX), +GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX), #define GEN_XXSEL_ROW(opc3) \ GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x18, opc3, 0, PPC_NONE, PPC2_VSX), \ diff --git a/target-ppc/translate.c b/target-ppc/translate.c index a29db98..5bab048 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -503,6 +503,7 @@ EXTRACT_HELPER_SPLIT(xA, 2, 1, 16, 5); EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5); EXTRACT_HELPER_SPLIT(xC, 3, 1, 6, 5); EXTRACT_HELPER(DM, 8, 2); +EXTRACT_HELPER(UIM, 16, 2); /*****************************************************************************/ /* PowerPC instructions table */