From patchwork Tue Jun 2 14:04:14 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haiying Wang X-Patchwork-Id: 28004 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@bilbo.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id 3080BB7069 for ; Wed, 3 Jun 2009 00:07:08 +1000 (EST) Received: by ozlabs.org (Postfix) id 454D4DE8F7; Wed, 3 Jun 2009 00:04:41 +1000 (EST) Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 43531DE8F6 for ; Wed, 3 Jun 2009 00:04:41 +1000 (EST) X-Original-To: linuxppc-dev@ozlabs.org Delivered-To: linuxppc-dev@ozlabs.org Received: from az33egw02.freescale.net (az33egw02.freescale.net [192.88.158.103]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "az33egw02.freescale.net", Issuer "Thawte Premium Server CA" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 30AA2DE135 for ; Wed, 3 Jun 2009 00:03:48 +1000 (EST) Received: from de01smr01.freescale.net (de01smr01.freescale.net [10.208.0.31]) by az33egw02.freescale.net (8.14.3/az33egw02) with ESMTP id n52E3glZ029356; Tue, 2 Jun 2009 07:03:42 -0700 (MST) Received: from r54964-12.am.freescale.net (R54964-12.am.freescale.net [10.29.201.229]) by de01smr01.freescale.net (8.13.1/8.13.0) with ESMTP id n52E3eDZ003033; Tue, 2 Jun 2009 09:03:41 -0500 (CDT) Received: from r54964-12.am.freescale.net (localhost.localdomain [127.0.0.1]) by r54964-12.am.freescale.net (8.13.8/8.13.8) with ESMTP id n52E4KBw004718; Tue, 2 Jun 2009 10:04:21 -0400 Received: (from why@localhost) by r54964-12.am.freescale.net (8.13.8/8.13.8/Submit) id n52E4JSL004717; Tue, 2 Jun 2009 10:04:19 -0400 From: Haiying Wang To: davem@davemloft.net, galak@kernel.crashing.org Subject: [PATCH 2/4] fsl_pq_mido: Set the first UCC as the mii management interface master Date: Tue, 2 Jun 2009 10:04:14 -0400 Message-Id: <1243951456-4685-2-git-send-email-Haiying.Wang@freescale.com> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1243951456-4685-1-git-send-email-Haiying.Wang@freescale.com> References: <1243951456-4685-1-git-send-email-Haiying.Wang@freescale.com> X-Brightmail-Tracker: AAAAAQAAAWE= Cc: linuxppc-dev@ozlabs.org, Haiying Wang , netdev@vger.kernel.org X-BeenThere: linuxppc-dev@ozlabs.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org Current code makes the UCC whose register range includes the current mdio register to be the MII managemnt interface master of the QE. If there is more than one mdio bus for QE, the UCC of the last mdio bus will be the MII management interface master which will make the primary mdio bus working unproperly, e.g. can not get the right clock. Normally the primary mdio bus is the first UEC's mdio bus. This patch allows the first UCC to be the MII management interface master of the multiple UCC mdio buses. Signed-off-by: Haiying Wang --- drivers/net/fsl_pq_mdio.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c index d12e0e0..3af5813 100644 --- a/drivers/net/fsl_pq_mdio.c +++ b/drivers/net/fsl_pq_mdio.c @@ -301,13 +301,17 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev, of_device_is_compatible(np, "ucc_geth_phy")) { #ifdef CONFIG_UCC_GETH u32 id; + static u32 mii_mng_master; tbipa = ®s->utbipar; if ((err = get_ucc_id_for_range(addr, addr + size, &id))) goto err_free_irqs; - ucc_set_qe_mux_mii_mng(id - 1); + if (!mii_mng_master) { + mii_mng_master = id; + ucc_set_qe_mux_mii_mng(id - 1); + } #else err = -ENODEV; goto err_free_irqs;