From patchwork Wed Oct 2 12:41:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Apfelbaum X-Patchwork-Id: 279732 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CF4332C007E for ; Wed, 2 Oct 2013 22:45:31 +1000 (EST) Received: from localhost ([::1]:35866 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRLo1-0006Yo-Ml for incoming@patchwork.ozlabs.org; Wed, 02 Oct 2013 08:45:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56247) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRLkU-00011V-Bj for qemu-devel@nongnu.org; Wed, 02 Oct 2013 08:41:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VRLkO-0008Gw-BU for qemu-devel@nongnu.org; Wed, 02 Oct 2013 08:41:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:62635) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRLkO-0008Gq-2a for qemu-devel@nongnu.org; Wed, 02 Oct 2013 08:41:44 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r92CfdF2002746 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 2 Oct 2013 08:41:39 -0400 Received: from localhost.localdomain.com (vpn-200-122.tlv.redhat.com [10.35.200.122]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id r92CfFYs001839; Wed, 2 Oct 2013 08:41:35 -0400 From: Marcel Apfelbaum To: qemu-devel@nongnu.org Date: Wed, 2 Oct 2013 15:41:29 +0300 Message-Id: <1380717694-13091-5-git-send-email-marcel.a@redhat.com> In-Reply-To: <1380717694-13091-1-git-send-email-marcel.a@redhat.com> References: <1380717694-13091-1-git-send-email-marcel.a@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: kwolf@redhat.com, peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, anthony@codemonkey.ws, mst@redhat.com, sw@weilnetz.de, jasowang@redhat.com, dkoch@verizon.com, keith.busch@intel.com, alex.williamson@redhat.com, kraxel@redhat.com, stefanha@redhat.com, dmitry@daynix.com, pbonzini@redhat.com, afaerber@suse.de, ehabkost@redhat.com Subject: [Qemu-devel] [PATCH RFC v2 4/9] hw/vmxnet3: set interrupts using pci irq wrappers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org pci_set_irq uses PCI_INTERRUPT_PIN config register to compute device INTx pin to set. An assert is used to ensure that intx received from the quest OS corresponds to PCI_INTERRUPT_PIN. Signed-off-by: Marcel Apfelbaum --- hw/net/vmxnet3.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index 49c2466..674ee7a 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -336,7 +336,7 @@ static bool _vmxnet3_assert_interrupt_line(VMXNET3State *s, uint32_t int_idx) } VMW_IRPRN("Asserting line for interrupt %u", int_idx); - qemu_set_irq(d->irq[int_idx], 1); + pci_set_irq(d, 1); return true; } @@ -356,7 +356,7 @@ static void _vmxnet3_deassert_interrupt_line(VMXNET3State *s, int lidx) assert(!s->msi_used || !msi_enabled(d)); VMW_IRPRN("Deasserting line for interrupt %u", lidx); - qemu_set_irq(d->irq[lidx], 0); + pci_set_irq(d, 1); } static void vmxnet3_update_interrupt_line_state(VMXNET3State *s, int lidx) @@ -1299,6 +1299,12 @@ static void vmxnet3_update_features(VMXNET3State *s) } } +static bool vmxnet3_verify_intx(VMXNET3State *s, int intx) +{ + return s->msix_used || s->msi_used || (intx == + (pci_get_byte(s->parent_obj.config + PCI_INTERRUPT_PIN) - 1)); +} + static void vmxnet3_activate_device(VMXNET3State *s) { int i; @@ -1332,6 +1338,7 @@ static void vmxnet3_activate_device(VMXNET3State *s) s->event_int_idx = VMXNET3_READ_DRV_SHARED8(s->drv_shmem, devRead.intrConf.eventIntrIdx); + assert(vmxnet3_verify_intx(s, s->event_int_idx)); VMW_CFPRN("Events interrupt line is %u", s->event_int_idx); s->auto_int_masking = @@ -1364,6 +1371,7 @@ static void vmxnet3_activate_device(VMXNET3State *s) /* Read interrupt number for this TX queue */ s->txq_descr[i].intr_idx = VMXNET3_READ_TX_QUEUE_DESCR8(qdescr_pa, conf.intrIdx); + assert(vmxnet3_verify_intx(s, s->txq_descr[i].intr_idx)); VMW_CFPRN("TX Queue %d interrupt: %d", i, s->txq_descr[i].intr_idx); @@ -1411,6 +1419,7 @@ static void vmxnet3_activate_device(VMXNET3State *s) /* Read interrupt number for this RX queue */ s->rxq_descr[i].intr_idx = VMXNET3_READ_TX_QUEUE_DESCR8(qd_pa, conf.intrIdx); + assert(vmxnet3_verify_intx(s, s->rxq_descr[i].intr_idx)); VMW_CFPRN("RX Queue %d interrupt: %d", i, s->rxq_descr[i].intr_idx);