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[Bug,1233225] Re: mips/mipsel linux user float division problem

Message ID 524B33F6.8060904@weilnetz.de
State Under Review
Headers show

Commit Message

Stefan Weil Oct. 1, 2013, 8:43 p.m. UTC 
Am 01.10.2013 20:14, schrieb Stefan Weil:
> Here is the related commit found by git bisect:
>
> $ git bisect bad
> 68473f15d4c9948986618f63828825beafcaf1cf is the first bad commit
> commit 68473f15d4c9948986618f63828825beafcaf1cf
> Author: Richard Henderson <rth@twiddle.net>
> Date:   Sun Feb 10 10:30:46 2013 -0800
>
>     mips64-linux-user: Enable 64-bit address mode and fpu
>     
>     Signed-off-by: Richard Henderson <rth@twiddle.net>
>     Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
>
> :040000 040000 de3caa25e43aaeb7d992715b2efc6804a7d0d633
> b007b2a9809547197952ca4d36fbd29f89aab470 M      target-mips
>


Hi Aurelien, hi Richard,

the following patch is a workaround which fixes the reported problem
(see https://bugs.launchpad.net/qemu/+bug/1233225):


Of course it's not the correct solution. I won't be able to look more
into this issue the next days, but maybe you already have a bug fix.

Regards,
Stefan
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Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index ad43d59..475b0f6 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15990,7 +15990,7 @@  void cpu_state_reset(CPUMIPSState *env)
     }
     /* Enable 64-bit FPU if the target cpu supports it.  */
     if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
-        env->CP0_Status |= (1 << CP0St_FR);
+        // env->CP0_Status |= (1 << CP0St_FR);
     }
 #else
     if (env->hflags & MIPS_HFLAG_BMASK) {