Patchwork [2/3] i2c: xilinx: Set tx direction in write operation

login
register
mail settings
Submitter Michal Simek
Date Sept. 30, 2013, 9:08 a.m.
Message ID <5d234cfc8d23cfc7e8d750f103344cf4e8e398d4.1380532113.git.michal.simek@xilinx.com>
Download mbox | patch
Permalink /patch/278970/
State Superseded
Headers show

Comments

Michal Simek - Sept. 30, 2013, 9:08 a.m.
From: Kedareswara rao Appana <appana.durga.rao@xilinx.com>

In write operation, after filling address byte to tx fifo,
set the direction of transfer to tx using control register.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 drivers/i2c/busses/i2c-xiic.c | 5 +++++
 1 file changed, 5 insertions(+)

--
1.8.2.3
Wolfram Sang - Sept. 30, 2013, 10:22 a.m.
On Mon, Sep 30, 2013 at 11:08:51AM +0200, Michal Simek wrote:
> From: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
> 
> In write operation, after filling address byte to tx fifo,
> set the direction of transfer to tx using control register.

You describe WHAT you do, yet you should describe WHY the change is
needed. For example, I can't tell if this is an urgent bugfix or not.
Please rephrase.

> 
> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>  drivers/i2c/busses/i2c-xiic.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
> index 5eb0a8b..44e6ae7 100644
> --- a/drivers/i2c/busses/i2c-xiic.c
> +++ b/drivers/i2c/busses/i2c-xiic.c
> @@ -536,6 +536,7 @@ static void xiic_start_recv(struct xiic_i2c *i2c)
>  static void xiic_start_send(struct xiic_i2c *i2c)
>  {
>  	struct i2c_msg *msg = i2c->tx_msg;
> +	u32 cr;
> 
>  	xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK);
> 
> @@ -556,6 +557,10 @@ static void xiic_start_send(struct xiic_i2c *i2c)
>  		xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
>  	}
> 
> +	cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
> +	cr |= XIIC_CR_DIR_IS_TX_MASK;
> +	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr);
> +
>  	xiic_fill_tx_fifo(i2c);
> 
>  	/* Clear any pending Tx empty, Tx Error and then enable them. */
> --
> 1.8.2.3
>
Michal Simek - Sept. 30, 2013, 1:25 p.m.
On 09/30/2013 12:22 PM, Wolfram Sang wrote:
> On Mon, Sep 30, 2013 at 11:08:51AM +0200, Michal Simek wrote:
>> From: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
>>
>> In write operation, after filling address byte to tx fifo,
>> set the direction of transfer to tx using control register.
> 
> You describe WHAT you do, yet you should describe WHY the change is
> needed. For example, I can't tell if this is an urgent bugfix or not.
> Please rephrase.
> 

Will do.

Thanks,
Michal

Patch

diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 5eb0a8b..44e6ae7 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -536,6 +536,7 @@  static void xiic_start_recv(struct xiic_i2c *i2c)
 static void xiic_start_send(struct xiic_i2c *i2c)
 {
 	struct i2c_msg *msg = i2c->tx_msg;
+	u32 cr;

 	xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK);

@@ -556,6 +557,10 @@  static void xiic_start_send(struct xiic_i2c *i2c)
 		xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
 	}

+	cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
+	cr |= XIIC_CR_DIR_IS_TX_MASK;
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr);
+
 	xiic_fill_tx_fifo(i2c);

 	/* Clear any pending Tx empty, Tx Error and then enable them. */