Patchwork RFA [testsuite]: New ARC target specific tests

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Submitter Joern Rennecke
Date Sept. 28, 2013, 12:40 p.m.
Message ID <20130928084013.2ikmgo08ow0wg44k-nzlynne@webmail.spamcop.net>
Download mbox | patch
Permalink /patch/278739/
State New
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Comments

Joern Rennecke - Sept. 28, 2013, 12:40 p.m.
This patch adds a number of tests for ARC target specific options.

I'm a bit uncertain here if I still need approval for this patch.
On the one hand the changes are all in an area that is normally within
the remit of a target maintainer, and patch to add the gcc.target/arc
directory has already been accepted.
OTOH, the man body of the ARC port is still stuck waiting for review,
so I'm still in the weird position of a target maintainer without an
accepted target port.
2013-09-28  Simon Cook  <simon.cook@embecosm.com>
	    Joern Rennecke  <joern.rennecke@embecosm.com>

	* gcc.target/arc/barrel-shifter-1.c: New test.
	* gcc.target/arc/barrel-shifter-2.c: Likewise.
	* gcc.target/arc/long-calls.c, gcc.target/arc/mA6.c: Likewise.
	* gcc.target/arc/mA7.c, gcc.target/arc/mARC600.c: Likewise.
	* gcc.target/arc/mARC601.c, gcc.target/arc/mARC700.c: Likewise.
	* gcc.target/arc/mcpu-arc600.c, gcc.target/arc/mcpu-arc601.c: Likewise.
	* gcc.target/arc/mcpu-arc700.c, gcc.target/arc/mcrc.c: Likewise.
	* gcc.target/arc/mdpfp.c, gcc.target/arc/mdsp-packa.c: Likewise.
	* gcc.target/arc/mdvbf.c, gcc.target/arc/mlock.c: Likewise.
	* gcc.target/arc/mmac-24.c, gcc.target/arc/mmac-d16.c: Likewise.
	* gcc.target/arc/mno-crc.c, gcc.target/arc/mno-dsp-packa.c: Likewise.
	* gcc.target/arc/mno-dvbf.c, gcc.target/arc/mno-lock.c: Likewise.
	* gcc.target/arc/mno-mac-24.c, gcc.target/arc/mno-mac-d16.c: Likewise.
	* gcc.target/arc/mno-rtsc.c, gcc.target/arc/mno-swape.c: Likewise.
	* gcc.target/arc/mno-xy.c, gcc.target/arc/mrtsc.c: Likewise.
	* gcc.target/arc/mspfp.c, gcc.target/arc/mswape.c: Likewise.
	* gcc.target/arc/mtune-ARC600.c: Likewise.
	* gcc.target/arc/mtune-ARC601.c: Likewise.
	* gcc.target/arc/mtune-ARC700-xmac: Likewise.
	* gcc.target/arc/mtune-ARC700.c: Likewise.
	* gcc.target/arc/mtune-ARC725D.c: Likewise.
	* gcc.target/arc/mtune-ARC750D.c: Likewise.
	* gcc.target/arc/mul64.c, gcc.target/arc/mxy.c: Likewise.
	* gcc.target/arc/no-dpfp-lrsr.c: Likewise.
Mike Stump - Sept. 29, 2013, 5:59 p.m.
On Sep 28, 2013, at 5:40 AM, Joern Rennecke <joern.rennecke@embecosm.com> wrote:
> This patch adds a number of tests for ARC target specific options.
> 
> I'm a bit uncertain here if I still need approval for this patch.

No, it is not required.  Target maintainers can approve the usual tests suite patches.  Everything in gcc.target/<target> certainly are in this set.  They typical changes to .exp for target supports for example are fine, as are the typical patches in existing test cases to declare things like small stacks, low memory, no common support, 16 bit porting, 32  bit porting and so on…  if in doubt, ask, we endeavor to be responsive to patches.

> On the one hand the changes are all in an area that is normally within
> the remit of a target maintainer, and patch to add the gcc.target/arc
> directory has already been accepted.

Though, technically, it should go in as the port goes in.  :-)

I did review the patch anyway, Ok.

Patch

diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
new file mode 100644
index 0000000..a0eb6d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ARC601 -mbarrel-shifter" } */
+int i;
+
+int f (void)
+{
+  i >>= 2;
+}
+
+/* { dg-final { scan-assembler "asr_s" } } */
diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c b/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
new file mode 100644
index 0000000..97998fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+int i;
+
+int f (void)
+{
+  i >>= 2;
+}
+
+/* { dg-final { scan-assembler "asr_s" } } */
diff --git a/gcc/testsuite/gcc.target/arc/long-calls.c b/gcc/testsuite/gcc.target/arc/long-calls.c
new file mode 100644
index 0000000..63fafbc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/long-calls.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlong-calls" } */
+
+int g (void);
+
+int f (void)
+{
+        g();
+}
+
+/* { dg-final { scan-assembler "j @g" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mA6.c b/gcc/testsuite/gcc.target/arc/mA6.c
new file mode 100644
index 0000000..2e15a86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mA6.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mA6" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mA7.c b/gcc/testsuite/gcc.target/arc/mA7.c
new file mode 100644
index 0000000..c4430f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mA7.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mA7" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mARC600.c b/gcc/testsuite/gcc.target/arc/mARC600.c
new file mode 100644
index 0000000..20e086a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mARC600.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mARC601.c b/gcc/testsuite/gcc.target/arc/mARC601.c
new file mode 100644
index 0000000..1d30da4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mARC601.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC601" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mARC700.c b/gcc/testsuite/gcc.target/arc/mARC700.c
new file mode 100644
index 0000000..43e9baa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mARC700.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc600.c b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
new file mode 100644
index 0000000..4c915fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc601.c b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
new file mode 100644
index 0000000..7c93c9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC601" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc700.c b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
new file mode 100644
index 0000000..c805a5a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcrc.c b/gcc/testsuite/gcc.target/arc/mcrc.c
new file mode 100644
index 0000000..d3780bb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcrc.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mcrc" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mdpfp.c b/gcc/testsuite/gcc.target/arc/mdpfp.c
new file mode 100644
index 0000000..4bbc905
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mdpfp.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdpfp" } */
+
+double i;
+
+int f (void)
+{
+        i *= 2.0;
+}
+
+/* { dg-final { scan-assembler "daddh" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mdsp-packa.c b/gcc/testsuite/gcc.target/arc/mdsp-packa.c
new file mode 100644
index 0000000..f013a6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mdsp-packa.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mdsp-packa" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mdvbf.c b/gcc/testsuite/gcc.target/arc/mdvbf.c
new file mode 100644
index 0000000..e2e545e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mdvbf.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mdvbf" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mlock.c b/gcc/testsuite/gcc.target/arc/mlock.c
new file mode 100644
index 0000000..3a8b050
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mlock.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mlock" } */
+/* { dg-do assemble } */
+
+int f (void *p)
+{
+  int i;
+
+  __asm__("llock %0, [%1]\n\t"
+	  "scond %0, [%1]" : "=&r"(i) : "r"(p));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mmac-24.c b/gcc/testsuite/gcc.target/arc/mmac-24.c
new file mode 100644
index 0000000..30cb698
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mmac-24.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mmac-24" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mmac-d16.c b/gcc/testsuite/gcc.target/arc/mmac-d16.c
new file mode 100644
index 0000000..0570011
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mmac-d16.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mmac-d16" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-crc.c b/gcc/testsuite/gcc.target/arc/mno-crc.c
new file mode 100644
index 0000000..70ab9c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-crc.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-crc" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
new file mode 100644
index 0000000..eb21522
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-dsp-packa" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-dvbf.c b/gcc/testsuite/gcc.target/arc/mno-dvbf.c
new file mode 100644
index 0000000..ea96d98
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-dvbf.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-dvbf" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-lock.c b/gcc/testsuite/gcc.target/arc/mno-lock.c
new file mode 100644
index 0000000..62ac885
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-lock.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-lock" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (void *p)
+{
+  int i;
+
+  __asm__("llock %0, [%1]\n\t"
+	  "scond %0, [%1]" : "=&r"(i) : "r"(p));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-24.c b/gcc/testsuite/gcc.target/arc/mno-mac-24.c
new file mode 100644
index 0000000..b483957
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-mac-24.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-mac-24" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-d16.c b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
new file mode 100644
index 0000000..68a20f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-mac-d16" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-rtsc.c b/gcc/testsuite/gcc.target/arc/mno-rtsc.c
new file mode 100644
index 0000000..d74a60e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-rtsc.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-rtsc" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-swape.c b/gcc/testsuite/gcc.target/arc/mno-swape.c
new file mode 100644
index 0000000..c853ab4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-swape.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-swape" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("swape %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-xy.c b/gcc/testsuite/gcc.target/arc/mno-xy.c
new file mode 100644
index 0000000..e378b3f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-xy.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mno-xy" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+void f (int i)
+{
+  __asm__("add x0_u0, x0_u0, %0" : :  "r" (i));
+}
diff --git a/gcc/testsuite/gcc.target/arc/mrtsc.c b/gcc/testsuite/gcc.target/arc/mrtsc.c
new file mode 100644
index 0000000..31852a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mrtsc.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mrtsc" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mspfp.c b/gcc/testsuite/gcc.target/arc/mspfp.c
new file mode 100644
index 0000000..0e41ff8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mspfp.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mspfp" } */
+
+float i;
+
+int f (void)
+{
+        i *= 2.0;
+}
+
+/* { dg-final { scan-assembler "fadd" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mswape.c b/gcc/testsuite/gcc.target/arc/mswape.c
new file mode 100644
index 0000000..692e6a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mswape.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mswape" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("swape %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC600.c b/gcc/testsuite/gcc.target/arc/mtune-ARC600.c
new file mode 100644
index 0000000..a483d14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC600.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC601.c b/gcc/testsuite/gcc.target/arc/mtune-ARC601.c
new file mode 100644
index 0000000..ed57bd7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC601.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac b/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
new file mode 100644
index 0000000..2f1e137
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC700-xmac" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC700.c b/gcc/testsuite/gcc.target/arc/mtune-ARC700.c
new file mode 100644
index 0000000..851ea73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC700.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c b/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
new file mode 100644
index 0000000..e2aa484
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC725D" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c b/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
new file mode 100644
index 0000000..2092330
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
@@ -0,0 +1,4 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC750D" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mul64.c b/gcc/testsuite/gcc.target/arc/mul64.c
new file mode 100644
index 0000000..3678b27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mul64.c
@@ -0,0 +1,13 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ARC600 -mmul64" } */
+#include <stdint.h>
+
+int64_t i;
+int j, k;
+
+int f (void)
+{
+        i = j * k;
+}
+
+/* { dg-final { scan-assembler "mul64" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mxy.c b/gcc/testsuite/gcc.target/arc/mxy.c
new file mode 100644
index 0000000..1ecc34d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mxy.c
@@ -0,0 +1,8 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mxy" } */
+/* { dg-do assemble } */
+
+void f (int i)
+{
+  __asm__("add x0_u0, x0_u0, %0" : :  "r" (i));
+}
diff --git a/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
new file mode 100644
index 0000000..e4e23e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdpfp -mno-dpfp-lrsr" } */
+
+double i;
+
+int f (void)
+{
+        i *= 2.0;
+}
+
+/* { dg-final { scan-assembler-not "\tlr" } } */