@@ -157,6 +157,7 @@ static void setup_boot_env(ARMCPU *cpu)
static void default_write_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
+#ifndef TARGET_AARCH64
int n;
smpboot[smpboot_array_size - 1] = info->smp_bootreg_addr;
smpboot[smpboot_array_size - 2] = info->gic_cpu_if_addr;
@@ -171,15 +172,18 @@ static void default_write_secondary(ARMCPU *cpu,
rom_add_blob_fixed("smpboot", smpboot,
smpboot_array_size * sizeof(uint32_t),
info->smp_loader_start);
+#endif
}
static void default_reset_secondary(ARMCPU *cpu,
const struct arm_boot_info *info)
{
+#ifndef TARGET_AARCH64
CPUARMState *env = &cpu->env;
stl_phys_notdirty(info->smp_bootreg_addr, 0);
env->regs[15] = info->smp_loader_start;
+#endif
}
#define WRITE_WORD(p, value) do { \
@@ -27,12 +27,19 @@ static uint32_t kvm_arm_targets[KVM_ARM_NUM_TARGETS] = {
KVM_ARM_TARGET_CORTEX_A57
};
+#define ARM_VCPU_FEATURE_FLAGS(cpuid, is_aarch32) \
+((!!(cpuid) << KVM_ARM_VCPU_POWER_OFF) | (is_aarch32 << KVM_ARM_VCPU_EL1_32BIT))
+
int kvm_arch_init_vcpu(CPUState *cs)
{
struct kvm_vcpu_init init;
int ret, i;
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+
memset(init.features, 0, sizeof(init.features));
+ init.features[0] = ARM_VCPU_FEATURE_FLAGS(cs->cpu_index, !env->aarch64);
/* Find an appropriate target CPU type.
* KVM does not provide means to detect the host CPU type on aarch64,
* and simply refuses to initialize, if the CPU type mis-matches;