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[32/32] PPC: Ignore writes to L2CR

Message ID 35B4F853-B0ED-4ACD-94E3-EA2E6F1AF433@suse.de
State New
Headers show

Commit Message

Alexander Graf Sept. 25, 2013, 1 p.m. UTC 
On 06.09.2013, at 14:54, Julio Guerra wrote:

> 2013/6/30 Alexander Graf <agraf@suse.de>:
>> The L2CR register contains a number of bits that either impose configuration
>> which we can't deal with or mean "something is in progress until the bit is
>> 0 again".
>> 
>> Since we don't model the former and we do want to accomodate guests using the
>> latter semantics, let's just ignore writes to L2CR. That way guests always read
>> back 0 and are usually happy with that.
> 
> Hi,
> 
> It does not seem to simply ignore writes to L2CR. The kernel we run on
> qemu no longer works without deleting the write instructions to L2CR.
> And a simple test of executing a write to L2CR seems to generate an
> exception instead of ignoring it :
> 
>> $ qemu-system-ppc -cpu e600 -M prep -m 256M -bios prep_bios.elf -d in_asm
>> Trying to write invalid spr 1017 (0x3f9) at fffffffc
>> Trying to write invalid spr 1017 (0x3f9) at fffffffc
>> IN:
>> 0xfffffffc:  mtl2cr  r0
>> 
>> invalid/unsupported opcode: 00 - 00 - 00 (00000000) fff00700 0
>> IN:
>> 0xfff00700:  .long 0x0
> 
> Is it really what you wanted ?

Ouch. No, not at all. Does this patch work for you?


Alex

Comments

Julio Guerra Sept. 25, 2013, 1:40 p.m. UTC | #1 
2013/9/25 Alexander Graf <agraf@suse.de>:
>
> On 06.09.2013, at 14:54, Julio Guerra wrote:
>
>> 2013/6/30 Alexander Graf <agraf@suse.de>:
>>> The L2CR register contains a number of bits that either impose configuration
>>> which we can't deal with or mean "something is in progress until the bit is
>>> 0 again".
>>>
>>> Since we don't model the former and we do want to accomodate guests using the
>>> latter semantics, let's just ignore writes to L2CR. That way guests always read
>>> back 0 and are usually happy with that.
>>
>> Hi,
>>
>> It does not seem to simply ignore writes to L2CR. The kernel we run on
>> qemu no longer works without deleting the write instructions to L2CR.
>> And a simple test of executing a write to L2CR seems to generate an
>> exception instead of ignoring it :
>>
>>> $ qemu-system-ppc -cpu e600 -M prep -m 256M -bios prep_bios.elf -d in_asm
>>> Trying to write invalid spr 1017 (0x3f9) at fffffffc
>>> Trying to write invalid spr 1017 (0x3f9) at fffffffc
>>> IN:
>>> 0xfffffffc:  mtl2cr  r0
>>>
>>> invalid/unsupported opcode: 00 - 00 - 00 (00000000) fff00700 0
>>> IN:
>>> 0xfff00700:  .long 0x0
>>
>> Is it really what you wanted ?
>
> Ouch. No, not at all. Does this patch work for you?
>
>

Yes, it does :)
diff mbox

Patch

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index d2645ba..fd45093 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -108,6 +108,11 @@  static void spr_write_clear (void *opaque, int sprn, int gprn)
     tcg_temp_free(t0);
     tcg_temp_free(t1);
 }
+
+static void spr_access_nop(void *opaque, int sprn, int gprn)
+{
+}
+
 #endif

 /* SPR common to all PowerPC */
@@ -1382,7 +1387,7 @@  static void gen_spr_74xx (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Not strictly an SPR */
     vscr_init(env, 0x00010000);
@@ -5170,7 +5175,7 @@  static void init_proc_750 (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Time base */
     gen_tbl(env);
@@ -5233,7 +5238,7 @@  static void init_proc_750cl (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Time base */
     gen_tbl(env);
@@ -5419,7 +5424,7 @@  static void init_proc_750cx (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Time base */
     gen_tbl(env);
@@ -5486,7 +5491,7 @@  static void init_proc_750fx (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Time base */
     gen_tbl(env);
@@ -5558,7 +5563,7 @@  static void init_proc_750gx (CPUPPCState *env)
     /* XXX : not implemented (XXX: different from 750fx) */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Time base */
     gen_tbl(env);
@@ -5694,7 +5699,7 @@  static void init_proc_755 (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* XXX : not implemented */
     spr_register(env, SPR_L2PMCR, "L2PMCR",
@@ -6650,7 +6655,7 @@  static void init_proc_970 (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Memory management */
     /* XXX: not correct */
@@ -6750,7 +6755,7 @@  static void init_proc_970FX (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Memory management */
     /* XXX: not correct */
@@ -6862,7 +6867,7 @@  static void init_proc_970GX (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Memory management */
     /* XXX: not correct */
@@ -6962,7 +6967,7 @@  static void init_proc_970MP (CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Memory management */
     /* XXX: not correct */
@@ -7054,7 +7059,7 @@  static void init_proc_power5plus(CPUPPCState *env)
     /* XXX : not implemented */
     spr_register(env, SPR_L2CR, "L2CR",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, NULL,
+                 &spr_read_generic, spr_access_nop,
                  0x00000000);
     /* Memory management */
     /* XXX: not correct */