diff mbox

driver/mtd/IFC: Add support of 8K page size NAND flash

Message ID 1380021083-15986-1-git-send-email-prabhakar@freescale.com
State Accepted
Commit ebff90b288c347f3af1b3d164c258aeb2bed60ec
Headers show

Commit Message

Prabhakar Kushwaha Sept. 24, 2013, 11:11 a.m. UTC
Current IFC driver supports till 4K page size NAND flash.
Add support of 8K Page size NAND flash
  - Add nand_ecclayout for 4 bit & 8 bit ecc
  - Defines constants
  - also fix ecc.strength for 8bit ecc of 8K page size NAND

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
 git://git.infradead.org/linux-mtd.git branch master
 
 arch/powerpc/include/asm/fsl_ifc.h |    2 +
 drivers/mtd/nand/fsl_ifc_nand.c    |   77 ++++++++++++++++++++++++++++++++++++
 2 files changed, 79 insertions(+)

Comments

Prabhakar Kushwaha Oct. 21, 2013, 3:33 a.m. UTC | #1
Hi Artem ,

This patch is present in upstream review list from a long time.
There are no review comments.

So, I request you to pick this patch for linux-mtd.git repository.

Regards,
Prabhakar


On 09/24/2013 04:41 PM, Prabhakar Kushwaha wrote:
> Current IFC driver supports till 4K page size NAND flash.
> Add support of 8K Page size NAND flash
>    - Add nand_ecclayout for 4 bit & 8 bit ecc
>    - Defines constants
>    - also fix ecc.strength for 8bit ecc of 8K page size NAND
>
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> ---
>   git://git.infradead.org/linux-mtd.git branch master
>   
>   arch/powerpc/include/asm/fsl_ifc.h |    2 +
>   drivers/mtd/nand/fsl_ifc_nand.c    |   77 ++++++++++++++++++++++++++++++++++++
>   2 files changed, 79 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h
> index b8a4b9b..f49ddb1 100644
> --- a/arch/powerpc/include/asm/fsl_ifc.h
> +++ b/arch/powerpc/include/asm/fsl_ifc.h
> @@ -93,6 +93,7 @@
>   #define CSOR_NAND_PGS_512		0x00000000
>   #define CSOR_NAND_PGS_2K		0x00080000
>   #define CSOR_NAND_PGS_4K		0x00100000
> +#define CSOR_NAND_PGS_8K		0x00180000
>   /* Spare region Size */
>   #define CSOR_NAND_SPRZ_MASK		0x0000E000
>   #define CSOR_NAND_SPRZ_SHIFT		13
> @@ -102,6 +103,7 @@
>   #define CSOR_NAND_SPRZ_210		0x00006000
>   #define CSOR_NAND_SPRZ_218		0x00008000
>   #define CSOR_NAND_SPRZ_224		0x0000A000
> +#define CSOR_NAND_SPRZ_CSOR_EXT		0x0000C000
>   /* Pages Per Block */
>   #define CSOR_NAND_PB_MASK		0x00000700
>   #define CSOR_NAND_PB_SHIFT		8
> diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
> index 317a771..a14885b 100644
> --- a/drivers/mtd/nand/fsl_ifc_nand.c
> +++ b/drivers/mtd/nand/fsl_ifc_nand.c
> @@ -135,6 +135,69 @@ static struct nand_ecclayout oob_4096_ecc8 = {
>   	.oobfree = { {2, 6}, {136, 82} },
>   };
>   
> +/* 8192-byte page size with 4-bit ECC */
> +static struct nand_ecclayout oob_8192_ecc4 = {
> +	.eccbytes = 128,
> +	.eccpos = {
> +		8, 9, 10, 11, 12, 13, 14, 15,
> +		16, 17, 18, 19, 20, 21, 22, 23,
> +		24, 25, 26, 27, 28, 29, 30, 31,
> +		32, 33, 34, 35, 36, 37, 38, 39,
> +		40, 41, 42, 43, 44, 45, 46, 47,
> +		48, 49, 50, 51, 52, 53, 54, 55,
> +		56, 57, 58, 59, 60, 61, 62, 63,
> +		64, 65, 66, 67, 68, 69, 70, 71,
> +		72, 73, 74, 75, 76, 77, 78, 79,
> +		80, 81, 82, 83, 84, 85, 86, 87,
> +		88, 89, 90, 91, 92, 93, 94, 95,
> +		96, 97, 98, 99, 100, 101, 102, 103,
> +		104, 105, 106, 107, 108, 109, 110, 111,
> +		112, 113, 114, 115, 116, 117, 118, 119,
> +		120, 121, 122, 123, 124, 125, 126, 127,
> +		128, 129, 130, 131, 132, 133, 134, 135,
> +	},
> +	.oobfree = { {2, 6}, {136, 208} },
> +};
> +
> +/* 8192-byte page size with 8-bit ECC -- requires 218-byte OOB */
> +static struct nand_ecclayout oob_8192_ecc8 = {
> +	.eccbytes = 256,
> +	.eccpos = {
> +		8, 9, 10, 11, 12, 13, 14, 15,
> +		16, 17, 18, 19, 20, 21, 22, 23,
> +		24, 25, 26, 27, 28, 29, 30, 31,
> +		32, 33, 34, 35, 36, 37, 38, 39,
> +		40, 41, 42, 43, 44, 45, 46, 47,
> +		48, 49, 50, 51, 52, 53, 54, 55,
> +		56, 57, 58, 59, 60, 61, 62, 63,
> +		64, 65, 66, 67, 68, 69, 70, 71,
> +		72, 73, 74, 75, 76, 77, 78, 79,
> +		80, 81, 82, 83, 84, 85, 86, 87,
> +		88, 89, 90, 91, 92, 93, 94, 95,
> +		96, 97, 98, 99, 100, 101, 102, 103,
> +		104, 105, 106, 107, 108, 109, 110, 111,
> +		112, 113, 114, 115, 116, 117, 118, 119,
> +		120, 121, 122, 123, 124, 125, 126, 127,
> +		128, 129, 130, 131, 132, 133, 134, 135,
> +		136, 137, 138, 139, 140, 141, 142, 143,
> +		144, 145, 146, 147, 148, 149, 150, 151,
> +		152, 153, 154, 155, 156, 157, 158, 159,
> +		160, 161, 162, 163, 164, 165, 166, 167,
> +		168, 169, 170, 171, 172, 173, 174, 175,
> +		176, 177, 178, 179, 180, 181, 182, 183,
> +		184, 185, 186, 187, 188, 189, 190, 191,
> +		192, 193, 194, 195, 196, 197, 198, 199,
> +		200, 201, 202, 203, 204, 205, 206, 207,
> +		208, 209, 210, 211, 212, 213, 214, 215,
> +		216, 217, 218, 219, 220, 221, 222, 223,
> +		224, 225, 226, 227, 228, 229, 230, 231,
> +		232, 233, 234, 235, 236, 237, 238, 239,
> +		240, 241, 242, 243, 244, 245, 246, 247,
> +		248, 249, 250, 251, 252, 253, 254, 255,
> +		256, 257, 258, 259, 260, 261, 262, 263,
> +	},
> +	.oobfree = { {2, 6}, {264, 80} },
> +};
>   
>   /*
>    * Generic flash bbt descriptors
> @@ -872,11 +935,25 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
>   		} else {
>   			layout = &oob_4096_ecc8;
>   			chip->ecc.bytes = 16;
> +			chip->ecc.strength = 8;
>   		}
>   
>   		priv->bufnum_mask = 1;
>   		break;
>   
> +	case CSOR_NAND_PGS_8K:
> +		if ((csor & CSOR_NAND_ECC_MODE_MASK) ==
> +		    CSOR_NAND_ECC_MODE_4) {
> +			layout = &oob_8192_ecc4;
> +		} else {
> +			layout = &oob_8192_ecc8;
> +			chip->ecc.bytes = 16;
> +			chip->ecc.strength = 8;
> +		}
> +
> +		priv->bufnum_mask = 0;
> +	break;
> +
>   	default:
>   		dev_err(priv->dev, "bad csor %#x: bad page size\n", csor);
>   		return -ENODEV;
Brian Norris Oct. 23, 2013, 4:43 p.m. UTC | #2
On Tue, Sep 24, 2013 at 04:41:23PM +0530, Prabhakar Kushwaha wrote:
> Current IFC driver supports till 4K page size NAND flash.
> Add support of 8K Page size NAND flash
>   - Add nand_ecclayout for 4 bit & 8 bit ecc
>   - Defines constants
>   - also fix ecc.strength for 8bit ecc of 8K page size NAND
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

These ECC layouts are rather horrendous and large, but they're the best
we've got...

Pushed to l2-mtd.git with compile testing only. Let me know if there are
any Tested-by's (or NAK's).

Brian

> ---
>  git://git.infradead.org/linux-mtd.git branch master
>  
>  arch/powerpc/include/asm/fsl_ifc.h |    2 +
>  drivers/mtd/nand/fsl_ifc_nand.c    |   77 ++++++++++++++++++++++++++++++++++++
>  2 files changed, 79 insertions(+)
> 
> diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h
> index b8a4b9b..f49ddb1 100644
> --- a/arch/powerpc/include/asm/fsl_ifc.h
> +++ b/arch/powerpc/include/asm/fsl_ifc.h
> @@ -93,6 +93,7 @@
>  #define CSOR_NAND_PGS_512		0x00000000
>  #define CSOR_NAND_PGS_2K		0x00080000
>  #define CSOR_NAND_PGS_4K		0x00100000
> +#define CSOR_NAND_PGS_8K		0x00180000
>  /* Spare region Size */
>  #define CSOR_NAND_SPRZ_MASK		0x0000E000
>  #define CSOR_NAND_SPRZ_SHIFT		13
> @@ -102,6 +103,7 @@
>  #define CSOR_NAND_SPRZ_210		0x00006000
>  #define CSOR_NAND_SPRZ_218		0x00008000
>  #define CSOR_NAND_SPRZ_224		0x0000A000
> +#define CSOR_NAND_SPRZ_CSOR_EXT		0x0000C000
>  /* Pages Per Block */
>  #define CSOR_NAND_PB_MASK		0x00000700
>  #define CSOR_NAND_PB_SHIFT		8
> diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
> index 317a771..a14885b 100644
> --- a/drivers/mtd/nand/fsl_ifc_nand.c
> +++ b/drivers/mtd/nand/fsl_ifc_nand.c
> @@ -135,6 +135,69 @@ static struct nand_ecclayout oob_4096_ecc8 = {
>  	.oobfree = { {2, 6}, {136, 82} },
>  };
>  
> +/* 8192-byte page size with 4-bit ECC */
> +static struct nand_ecclayout oob_8192_ecc4 = {
> +	.eccbytes = 128,
> +	.eccpos = {
> +		8, 9, 10, 11, 12, 13, 14, 15,
> +		16, 17, 18, 19, 20, 21, 22, 23,
> +		24, 25, 26, 27, 28, 29, 30, 31,
> +		32, 33, 34, 35, 36, 37, 38, 39,
> +		40, 41, 42, 43, 44, 45, 46, 47,
> +		48, 49, 50, 51, 52, 53, 54, 55,
> +		56, 57, 58, 59, 60, 61, 62, 63,
> +		64, 65, 66, 67, 68, 69, 70, 71,
> +		72, 73, 74, 75, 76, 77, 78, 79,
> +		80, 81, 82, 83, 84, 85, 86, 87,
> +		88, 89, 90, 91, 92, 93, 94, 95,
> +		96, 97, 98, 99, 100, 101, 102, 103,
> +		104, 105, 106, 107, 108, 109, 110, 111,
> +		112, 113, 114, 115, 116, 117, 118, 119,
> +		120, 121, 122, 123, 124, 125, 126, 127,
> +		128, 129, 130, 131, 132, 133, 134, 135,
> +	},
> +	.oobfree = { {2, 6}, {136, 208} },
> +};
> +
> +/* 8192-byte page size with 8-bit ECC -- requires 218-byte OOB */
> +static struct nand_ecclayout oob_8192_ecc8 = {
> +	.eccbytes = 256,
> +	.eccpos = {
> +		8, 9, 10, 11, 12, 13, 14, 15,
> +		16, 17, 18, 19, 20, 21, 22, 23,
> +		24, 25, 26, 27, 28, 29, 30, 31,
> +		32, 33, 34, 35, 36, 37, 38, 39,
> +		40, 41, 42, 43, 44, 45, 46, 47,
> +		48, 49, 50, 51, 52, 53, 54, 55,
> +		56, 57, 58, 59, 60, 61, 62, 63,
> +		64, 65, 66, 67, 68, 69, 70, 71,
> +		72, 73, 74, 75, 76, 77, 78, 79,
> +		80, 81, 82, 83, 84, 85, 86, 87,
> +		88, 89, 90, 91, 92, 93, 94, 95,
> +		96, 97, 98, 99, 100, 101, 102, 103,
> +		104, 105, 106, 107, 108, 109, 110, 111,
> +		112, 113, 114, 115, 116, 117, 118, 119,
> +		120, 121, 122, 123, 124, 125, 126, 127,
> +		128, 129, 130, 131, 132, 133, 134, 135,
> +		136, 137, 138, 139, 140, 141, 142, 143,
> +		144, 145, 146, 147, 148, 149, 150, 151,
> +		152, 153, 154, 155, 156, 157, 158, 159,
> +		160, 161, 162, 163, 164, 165, 166, 167,
> +		168, 169, 170, 171, 172, 173, 174, 175,
> +		176, 177, 178, 179, 180, 181, 182, 183,
> +		184, 185, 186, 187, 188, 189, 190, 191,
> +		192, 193, 194, 195, 196, 197, 198, 199,
> +		200, 201, 202, 203, 204, 205, 206, 207,
> +		208, 209, 210, 211, 212, 213, 214, 215,
> +		216, 217, 218, 219, 220, 221, 222, 223,
> +		224, 225, 226, 227, 228, 229, 230, 231,
> +		232, 233, 234, 235, 236, 237, 238, 239,
> +		240, 241, 242, 243, 244, 245, 246, 247,
> +		248, 249, 250, 251, 252, 253, 254, 255,
> +		256, 257, 258, 259, 260, 261, 262, 263,
> +	},
> +	.oobfree = { {2, 6}, {264, 80} },
> +};
>  
>  /*
>   * Generic flash bbt descriptors
> @@ -872,11 +935,25 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
>  		} else {
>  			layout = &oob_4096_ecc8;
>  			chip->ecc.bytes = 16;
> +			chip->ecc.strength = 8;
>  		}
>  
>  		priv->bufnum_mask = 1;
>  		break;
>  
> +	case CSOR_NAND_PGS_8K:
> +		if ((csor & CSOR_NAND_ECC_MODE_MASK) ==
> +		    CSOR_NAND_ECC_MODE_4) {
> +			layout = &oob_8192_ecc4;
> +		} else {
> +			layout = &oob_8192_ecc8;
> +			chip->ecc.bytes = 16;
> +			chip->ecc.strength = 8;
> +		}
> +
> +		priv->bufnum_mask = 0;
> +	break;
> +
>  	default:
>  		dev_err(priv->dev, "bad csor %#x: bad page size\n", csor);
>  		return -ENODEV;
> -- 
> 1.7.9.5
> 
> 
> 
>
Prabhakar Kushwaha Oct. 24, 2013, 9:56 a.m. UTC | #3
On 10/23/2013 10:13 PM, Brian Norris wrote:
> On Tue, Sep 24, 2013 at 04:41:23PM +0530, Prabhakar Kushwaha wrote:
>> Current IFC driver supports till 4K page size NAND flash.
>> Add support of 8K Page size NAND flash
>>    - Add nand_ecclayout for 4 bit & 8 bit ecc
>>    - Defines constants
>>    - also fix ecc.strength for 8bit ecc of 8K page size NAND
>>
>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> These ECC layouts are rather horrendous and large, but they're the best
> we've got...
>
> Pushed to l2-mtd.git with compile testing only. Let me know if there are
> any Tested-by's (or NAK's).
>
>
Thanks Brian for applying this patch to l2-mtd.git.
I only tested this patch.

This same patch has been pushed for review on u-boot mailing list. Till 
now no comments.
means no NAK's :)

Regards,
Prabhakar
diff mbox

Patch

diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h
index b8a4b9b..f49ddb1 100644
--- a/arch/powerpc/include/asm/fsl_ifc.h
+++ b/arch/powerpc/include/asm/fsl_ifc.h
@@ -93,6 +93,7 @@ 
 #define CSOR_NAND_PGS_512		0x00000000
 #define CSOR_NAND_PGS_2K		0x00080000
 #define CSOR_NAND_PGS_4K		0x00100000
+#define CSOR_NAND_PGS_8K		0x00180000
 /* Spare region Size */
 #define CSOR_NAND_SPRZ_MASK		0x0000E000
 #define CSOR_NAND_SPRZ_SHIFT		13
@@ -102,6 +103,7 @@ 
 #define CSOR_NAND_SPRZ_210		0x00006000
 #define CSOR_NAND_SPRZ_218		0x00008000
 #define CSOR_NAND_SPRZ_224		0x0000A000
+#define CSOR_NAND_SPRZ_CSOR_EXT		0x0000C000
 /* Pages Per Block */
 #define CSOR_NAND_PB_MASK		0x00000700
 #define CSOR_NAND_PB_SHIFT		8
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 317a771..a14885b 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -135,6 +135,69 @@  static struct nand_ecclayout oob_4096_ecc8 = {
 	.oobfree = { {2, 6}, {136, 82} },
 };
 
+/* 8192-byte page size with 4-bit ECC */
+static struct nand_ecclayout oob_8192_ecc4 = {
+	.eccbytes = 128,
+	.eccpos = {
+		8, 9, 10, 11, 12, 13, 14, 15,
+		16, 17, 18, 19, 20, 21, 22, 23,
+		24, 25, 26, 27, 28, 29, 30, 31,
+		32, 33, 34, 35, 36, 37, 38, 39,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63,
+		64, 65, 66, 67, 68, 69, 70, 71,
+		72, 73, 74, 75, 76, 77, 78, 79,
+		80, 81, 82, 83, 84, 85, 86, 87,
+		88, 89, 90, 91, 92, 93, 94, 95,
+		96, 97, 98, 99, 100, 101, 102, 103,
+		104, 105, 106, 107, 108, 109, 110, 111,
+		112, 113, 114, 115, 116, 117, 118, 119,
+		120, 121, 122, 123, 124, 125, 126, 127,
+		128, 129, 130, 131, 132, 133, 134, 135,
+	},
+	.oobfree = { {2, 6}, {136, 208} },
+};
+
+/* 8192-byte page size with 8-bit ECC -- requires 218-byte OOB */
+static struct nand_ecclayout oob_8192_ecc8 = {
+	.eccbytes = 256,
+	.eccpos = {
+		8, 9, 10, 11, 12, 13, 14, 15,
+		16, 17, 18, 19, 20, 21, 22, 23,
+		24, 25, 26, 27, 28, 29, 30, 31,
+		32, 33, 34, 35, 36, 37, 38, 39,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63,
+		64, 65, 66, 67, 68, 69, 70, 71,
+		72, 73, 74, 75, 76, 77, 78, 79,
+		80, 81, 82, 83, 84, 85, 86, 87,
+		88, 89, 90, 91, 92, 93, 94, 95,
+		96, 97, 98, 99, 100, 101, 102, 103,
+		104, 105, 106, 107, 108, 109, 110, 111,
+		112, 113, 114, 115, 116, 117, 118, 119,
+		120, 121, 122, 123, 124, 125, 126, 127,
+		128, 129, 130, 131, 132, 133, 134, 135,
+		136, 137, 138, 139, 140, 141, 142, 143,
+		144, 145, 146, 147, 148, 149, 150, 151,
+		152, 153, 154, 155, 156, 157, 158, 159,
+		160, 161, 162, 163, 164, 165, 166, 167,
+		168, 169, 170, 171, 172, 173, 174, 175,
+		176, 177, 178, 179, 180, 181, 182, 183,
+		184, 185, 186, 187, 188, 189, 190, 191,
+		192, 193, 194, 195, 196, 197, 198, 199,
+		200, 201, 202, 203, 204, 205, 206, 207,
+		208, 209, 210, 211, 212, 213, 214, 215,
+		216, 217, 218, 219, 220, 221, 222, 223,
+		224, 225, 226, 227, 228, 229, 230, 231,
+		232, 233, 234, 235, 236, 237, 238, 239,
+		240, 241, 242, 243, 244, 245, 246, 247,
+		248, 249, 250, 251, 252, 253, 254, 255,
+		256, 257, 258, 259, 260, 261, 262, 263,
+	},
+	.oobfree = { {2, 6}, {264, 80} },
+};
 
 /*
  * Generic flash bbt descriptors
@@ -872,11 +935,25 @@  static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
 		} else {
 			layout = &oob_4096_ecc8;
 			chip->ecc.bytes = 16;
+			chip->ecc.strength = 8;
 		}
 
 		priv->bufnum_mask = 1;
 		break;
 
+	case CSOR_NAND_PGS_8K:
+		if ((csor & CSOR_NAND_ECC_MODE_MASK) ==
+		    CSOR_NAND_ECC_MODE_4) {
+			layout = &oob_8192_ecc4;
+		} else {
+			layout = &oob_8192_ecc8;
+			chip->ecc.bytes = 16;
+			chip->ecc.strength = 8;
+		}
+
+		priv->bufnum_mask = 0;
+	break;
+
 	default:
 		dev_err(priv->dev, "bad csor %#x: bad page size\n", csor);
 		return -ENODEV;