Message ID | 523C593E.9060706@arm.com |
---|---|
State | New |
Headers | show |
On 20 September 2013 15:18, Renlin Li <renli.li@arm.com> wrote: > 2013-09-20 Renlin Li <renlin.li@arm.com> > > * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant. > (aarch64_expand_epilogue): Likewise. > (aarch64_legitimize_reload_address): Likewise. OK /Marcus
Thank you, can you please commit it for me? Kind regards, Renlin Li On 09/20/13 15:26, Marcus Shawcroft wrote: > On 20 September 2013 15:18, Renlin Li <renli.li@arm.com> wrote: > >> 2013-09-20 Renlin Li <renlin.li@arm.com> >> >> * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant. >> (aarch64_expand_epilogue): Likewise. >> (aarch64_legitimize_reload_address): Likewise. > OK > /Marcus >
On Fri, Sep 20, 2013 at 03:40:59PM +0100, Renlin Li wrote: > Thank you, can you please commit it for me? > > Kind regards, > Renlin Li > > On 09/20/13 15:26, Marcus Shawcroft wrote: > > On 20 September 2013 15:18, Renlin Li <renli.li@arm.com> wrote: > > > >> 2013-09-20 Renlin Li <renlin.li@arm.com> > >> > >> * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant. > >> (aarch64_expand_epilogue): Likewise. > >> (aarch64_legitimize_reload_address): Likewise. Hi Renlin, This patch appears to have caused a number of regressions on an aarch64-none-elf test run. I see Internal Compiler Errors along these lines: ../src/gcc/gcc/testsuite/gcc.dg/vect/slp-multitypes-2.c: In function 'main1': ../src/gcc/gcc/testsuite/gcc.dg/vect/slp-multitypes-2.c:68:1: error: insn does not satisfy its constraints: } ^ (insn 182 472 183 (set (reg:QI 2 x2 [277]) (mem/c:QI (plus:DI (reg:DI 3 x3) (const_int 6264 [0x1878])) [0 b1+0 S1 A64])) ../src/gcc/gcc/testsuite/gcc.dg/vect/slp-multitypes-2.c:39 30 {*movqi_aarch64} (nil)) ../src/gcc/gcc/testsuite/gcc.dg/vect/slp-multitypes-2.c:68:1: internal compiler error: in final_scan_insn, at final.c:2886 0x8b8135 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*) /work/gcc-clean/src/gcc/gcc/rtl-error.c:109 0x8b815f _fatal_insn_not_found(rtx_def const*, char const*, int, char const*) /work/gcc-clean/src/gcc/gcc/rtl-error.c:120 0x6e1822 final_scan_insn(rtx_def*, _IO_FILE*, int, int, int*) /work/gcc-clean/src/gcc/gcc/final.c:2886 0x6e1b01 final(rtx_def*, _IO_FILE*, int) /work/gcc-clean/src/gcc/gcc/final.c:2017 0x6e1d49 rest_of_handle_final /work/gcc-clean/src/gcc/gcc/final.c:4422 0x6e1d49 execute /work/gcc-clean/src/gcc/gcc/final.c:4497 Please submit a full bug report, with preprocessed source if appropriate. Please include the complete backtrace with any bug report. See <http://gcc.gnu.org/bugs.html> for instructions. Thanks, James
On Sat, Sep 21, 2013 at 09:34:34AM +0100, James Greenhalgh wrote: > On Fri, Sep 20, 2013 at 03:40:59PM +0100, Renlin Li wrote: > > Thank you, can you please commit it for me? > > > > Kind regards, > > Renlin Li > > > > On 09/20/13 15:26, Marcus Shawcroft wrote: > > > On 20 September 2013 15:18, Renlin Li <renli.li@arm.com> wrote: > > > > > >> 2013-09-20 Renlin Li <renlin.li@arm.com> > > >> > > >> * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant. > > >> (aarch64_expand_epilogue): Likewise. > > >> (aarch64_legitimize_reload_address): Likewise. > > Hi Renlin, > > This patch appears to have caused a number of regressions on > an aarch64-none-elf test run. Marcus, Renlin, I'm also seeing issues building an AArch64 Linux toolchain with this patch applied, so I've reverted it for now. Thanks, James
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index e8ae20a..c65d845 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -2065,9 +2065,9 @@ aarch64_expand_prologue (void) emit_insn (gen_add2_insn (stack_pointer_rtx, op0)); aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx, - gen_rtx_PLUS (Pmode, - stack_pointer_rtx, - GEN_INT (-frame_size)))); + plus_constant (Pmode, + stack_pointer_rtx, + -frame_size))); } else if (frame_size > 0) { @@ -2151,9 +2151,9 @@ aarch64_expand_prologue (void) GEN_INT (fp_offset))); aarch64_set_frame_expr (gen_rtx_SET (Pmode, hard_frame_pointer_rtx, - gen_rtx_PLUS (Pmode, - stack_pointer_rtx, - GEN_INT (fp_offset)))); + plus_constant (Pmode, + stack_pointer_rtx, + fp_offset))); RTX_FRAME_RELATED_P (insn) = 1; insn = emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); @@ -2349,9 +2349,9 @@ aarch64_expand_epilogue (bool for_sibcall) emit_insn (gen_add2_insn (stack_pointer_rtx, op0)); aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx, - gen_rtx_PLUS (Pmode, - stack_pointer_rtx, - GEN_INT (frame_size)))); + plus_constant (Pmode, + stack_pointer_rtx, + frame_size))); } else if (frame_size > 0) { @@ -2373,10 +2373,10 @@ aarch64_expand_epilogue (bool for_sibcall) } } - aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx, - gen_rtx_PLUS (Pmode, - stack_pointer_rtx, - GEN_INT (offset)))); + aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx, + plus_constant (Pmode, + stack_pointer_rtx, + offset))); } emit_use (gen_rtx_REG (DImode, LR_REGNUM)); @@ -4014,9 +4014,9 @@ aarch64_legitimize_reload_address (rtx *x_p, /* Reload high part into base reg, leaving the low part in the mem instruction. */ - x = gen_rtx_PLUS (xmode, - gen_rtx_PLUS (xmode, XEXP (x, 0), cst), - GEN_INT (low)); + x = plus_constant (xmode, + gen_rtx_PLUS (xmode, XEXP (x, 0), cst), + low); push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL, BASE_REG_CLASS, xmode, VOIDmode, 0, 0,