From patchwork Thu Sep 19 07:29:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharat Bhushan X-Patchwork-Id: 275894 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 142E72C062C for ; Thu, 19 Sep 2013 17:38:38 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753139Ab3ISHhV (ORCPT ); Thu, 19 Sep 2013 03:37:21 -0400 Received: from mail-db8lp0188.outbound.messaging.microsoft.com ([213.199.154.188]:42828 "EHLO db8outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752253Ab3ISHhU (ORCPT ); Thu, 19 Sep 2013 03:37:20 -0400 Received: from mail195-db8-R.bigfish.com (10.174.8.245) by DB8EHSOBE004.bigfish.com (10.174.4.67) with Microsoft SMTP Server id 14.1.225.22; Thu, 19 Sep 2013 07:37:18 +0000 Received: from mail195-db8 (localhost [127.0.0.1]) by mail195-db8-R.bigfish.com (Postfix) with ESMTP id 74A5C3400A0; Thu, 19 Sep 2013 07:37:18 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 8 X-BigFish: VS8(zzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6h1082kz70kd2iz1de098h1de097h8275bhz2dh2a8h839he5bhf0ah107ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h1fe8h1ff5h20cfi1155h) Received: from mail195-db8 (localhost.localdomain [127.0.0.1]) by mail195-db8 (MessageSwitch) id 137957623616307_22345; Thu, 19 Sep 2013 07:37:16 +0000 (UTC) Received: from DB8EHSMHS009.bigfish.com (unknown [10.174.8.241]) by mail195-db8.bigfish.com (Postfix) with ESMTP id E77C1A0004A; Thu, 19 Sep 2013 07:37:15 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB8EHSMHS009.bigfish.com (10.174.4.19) with Microsoft SMTP Server (TLS) id 14.16.227.3; Thu, 19 Sep 2013 07:37:15 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.3.158.2; Thu, 19 Sep 2013 07:37:13 +0000 Received: from freescale.com ([10.232.15.72]) by az84smr01.freescale.net (8.14.3/8.14.0) with SMTP id r8J7b7vu029514; Thu, 19 Sep 2013 00:37:08 -0700 Received: by freescale.com (sSMTP sendmail emulation); Thu, 19 Sep 2013 12:59:54 +0530 From: Bharat Bhushan To: , , , , , , , , , CC: Bharat Bhushan , Bharat Bhushan Subject: [PATCH 4/7] powerpc: translate msi addr to iova if iommu is in use Date: Thu, 19 Sep 2013 12:59:20 +0530 Message-ID: <1379575763-2091-5-git-send-email-Bharat.Bhushan@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1379575763-2091-1-git-send-email-Bharat.Bhushan@freescale.com> References: <1379575763-2091-1-git-send-email-Bharat.Bhushan@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If the device is attached with iommu domain then set MSI address to the iova configured in PAMU. Signed-off-by: Bharat Bhushan --- arch/powerpc/sysdev/fsl_msi.c | 56 +++++++++++++++++++++++++++++++++++++++- 1 files changed, 54 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index ed045cb..c7cf018 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -150,7 +151,40 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev) return; } -static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, +static uint64_t fsl_iommu_get_iova(struct pci_dev *pdev, dma_addr_t msi_phys) +{ + struct iommu_domain *domain; + struct iommu_domain_geometry geometry; + u32 wins = 0; + uint64_t iova, size; + int ret, i; + + domain = iommu_get_dev_domain(&pdev->dev); + if (!domain) + return 0; + + ret = iommu_domain_get_attr(domain, DOMAIN_ATTR_WINDOWS, &wins); + if (ret) + return 0; + + ret = iommu_domain_get_attr(domain, DOMAIN_ATTR_GEOMETRY, &geometry); + if (ret) + return 0; + + iova = geometry.aperture_start; + size = geometry.aperture_end - geometry.aperture_start + 1; + do_div(size, wins); + for (i = 0; i < wins; i++) { + phys_addr_t phys; + phys = iommu_iova_to_phys(domain, iova); + if (phys == (msi_phys & ~(PAGE_SIZE - 1))) + return (iova + (msi_phys & (PAGE_SIZE - 1))); + iova += size; + } + return 0; +} + +static int fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, struct msi_msg *msg, struct fsl_msi *fsl_msi_data) { @@ -168,6 +202,16 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, address = fsl_pci_immrbar_base(hose) + (msi_data->msiir & 0xfffff); + /* + * If the device is attached with iommu domain then set MSI address + * to the iova configured in PAMU. + */ + if (iommu_get_dev_domain(&pdev->dev)) { + address = fsl_iommu_get_iova(pdev, msi_data->msiir); + if (!address) + return -ENODEV; + } + msg->address_lo = lower_32_bits(address); msg->address_hi = upper_32_bits(address); @@ -175,6 +219,8 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG); + + return 0; } static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) @@ -244,7 +290,13 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) /* chip_data is msi_data via host->hostdata in host->map() */ irq_set_msi_desc(virq, entry); - fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); + if (fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data)) { + dev_err(&pdev->dev, "Fail to set MSI for hwirq %i\n", + hwirq); + msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); + rc = -ENODEV; + goto out_free; + } write_msi_msg(virq, &msg); } return 0;