From patchwork Thu Sep 19 05:25:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 275865 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (unknown [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 344AA2C00EE for ; Thu, 19 Sep 2013 15:26:18 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMWkY-0004du-8v; Thu, 19 Sep 2013 05:25:58 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMWkW-00055H-IO; Thu, 19 Sep 2013 05:25:56 +0000 Received: from mail-pb0-x231.google.com ([2607:f8b0:400e:c01::231]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMWkU-00054X-HZ for linux-mtd@lists.infradead.org; Thu, 19 Sep 2013 05:25:55 +0000 Received: by mail-pb0-f49.google.com with SMTP id xb4so7934348pbc.22 for ; Wed, 18 Sep 2013 22:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=JrecU0vr2aJYJH1CBjAe2CFymq9TNjYDKCUVvapy80c=; b=ui/5oL81VNW/BwftfM2RDIslj3s9bOXx+4XH+CMojwJv6c6AIG5aZe7TelBNkftDI5 Rdf8Dl6f7FY+rV3anppWjYqh2CIwB+7ZKEZhGqg+cmNHuyE9JoQH9Q3SPxJGAvV5eCXI LQXuNDqKIvJi5sSmamqpFPINEbOWidAHlfESA6qDBVGr4Ft0pkVFYusgAt/EeiolVcgd GRZwsLoG0DED1Qx9Ajsxi16G+ijX7ijzfbf2N7xBNkSMn2OTyZqpn5mK60VE1h0Vnaqs WdrUl4trEDY7asN2pBKkH5EA+b0Gryzu2pJg2775isQRE8aXbg/JY0eRJZjmtymEPq0u ohKg== X-Received: by 10.66.216.234 with SMTP id ot10mr636058pac.122.1379568332906; Wed, 18 Sep 2013 22:25:32 -0700 (PDT) Received: from brian-ubuntu (cpe-98-154-223-43.socal.res.rr.com. [98.154.223.43]) by mx.google.com with ESMTPSA id oj6sm9416392pab.9.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 18 Sep 2013 22:25:32 -0700 (PDT) Date: Wed, 18 Sep 2013 22:25:26 -0700 From: Brian Norris To: Elie De Brauwer Subject: Re: [PATCH] mtd: m25p80: Fix 4 byte addressing mode for Micron devices. Message-ID: <20130919052526.GB31275@brian-ubuntu> References: <20130917014706.GL4550@ld-irv-0074.broadcom.com> <1379440103-5167-1-git-send-email-eliedebrauwer@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1379440103-5167-1-git-send-email-eliedebrauwer@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130919_012554_667977_05EB79EF X-CRM114-Status: GOOD ( 21.47 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (computersforpeace[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: linux-mtd@lists.infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org On Tue, Sep 17, 2013 at 07:48:22PM +0200, Elie De Brauwer wrote: > According to the datasheet for Micron n25q256a (N25Q256A13ESF40F) 4-byte > addressing mode should be entered as follows: > > > To enter or exit the 4-byte address mode, the WRITE ENABLE command > must be executed to set the write enable latch bit to 1. (Note: The > WRITE ENABLE command must NOT be executed on the N25Q256A83ESF40x and > N25Q256A83E1240x devices.) S# must be driven LOW. The effect of the > command is immediate; after the command has been executed, the write > enable latch bit is cleared to 0. > > > Micron's portable way to perform this for all types of Micron flash > is to first issue a write enable, then switch the addressing mode > followed by a write disable to avoid leaving the flash in a write- > able state. I just noticed, you're missing a "Signed-off-by: Your Name " If you reply with a line like that, I can past it into the commit. > --- > drivers/mtd/devices/m25p80.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c > index 26b14f9..272d483 100644 > --- a/drivers/mtd/devices/m25p80.c > +++ b/drivers/mtd/devices/m25p80.c > @@ -169,8 +169,16 @@ static inline int write_disable(struct m25p *flash) > static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable) > { > switch (JEDEC_MFR(jedec_id)) { > - case CFI_MFR_MACRONIX: > case CFI_MFR_ST: /* Micron, actually */ > + { > + int status; > + write_enable(flash); > + flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B; > + status = spi_write(flash->spi, flash->command, 1); > + write_disable(flash); > + return status; > + } > + case CFI_MFR_MACRONIX: > case 0xEF /* winbond */: > flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B; > return spi_write(flash->spi, flash->command, 1); I personally don't like the code duplication from the Macronix and Winbond cases, and the extra context braces may not be needed. How about the following? If it's OK, I'll just squash your description and my patch. Brian diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 26b14f9..6bc9618 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -168,12 +168,25 @@ static inline int write_disable(struct m25p *flash) */ static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable) { + int status; + bool need_wren = false; + switch (JEDEC_MFR(jedec_id)) { - case CFI_MFR_MACRONIX: case CFI_MFR_ST: /* Micron, actually */ + /* Some Micron need WREN command; all will accept it */ + need_wren = true; + case CFI_MFR_MACRONIX: case 0xEF /* winbond */: + if (need_wren) + write_enable(flash); + flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B; - return spi_write(flash->spi, flash->command, 1); + status = spi_write(flash->spi, flash->command, 1); + + if (need_wren) + write_disable(flash); + + return status; default: /* Spansion style */ flash->command[0] = OPCODE_BRWR;