Patchwork [U-Boot,02/10] arm: vf610: clean-up anadig register struct

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Submitter Marcel Ziswiler
Date Sept. 17, 2013, 10:45 a.m.
Message ID <6f62ebb5fef03f50fec97e90cc2df2879ed68442.1379414181.git.marcel@ziswiler.com>
Download mbox | patch
Permalink /patch/275425/
State Superseded
Delegated to: Albert ARIBAUD
Headers show

Comments

Marcel Ziswiler - Sept. 17, 2013, 10:45 a.m.
Re-number all the resv reserved fields.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
---
 arch/arm/include/asm/arch-vf610/crm_regs.h |   54 ++++++++++++++--------------
 1 file changed, 27 insertions(+), 27 deletions(-)

Patch

diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h
index 57a0242..d5c9387 100644
--- a/arch/arm/include/asm/arch-vf610/crm_regs.h
+++ b/arch/arm/include/asm/arch-vf610/crm_regs.h
@@ -55,59 +55,59 @@  struct ccm_reg {
 
 /* Analog components control digital interface (ANADIG) */
 struct anadig_reg {
-	u32 resvA[4];
+	u32 resv0[4];
 	u32 pll3_ctrl;
-	u32 resv0[3];
-	u32 pll7_ctrl;
 	u32 resv1[3];
-	u32 pll2_ctrl;
+	u32 pll7_ctrl;
 	u32 resv2[3];
-	u32 pll2_ss;
+	u32 pll2_ctrl;
 	u32 resv3[3];
-	u32 pll2_num;
+	u32 pll2_ss;
 	u32 resv4[3];
-	u32 pll2_denom;
+	u32 pll2_num;
 	u32 resv5[3];
-	u32 pll4_ctrl;
+	u32 pll2_denom;
 	u32 resv6[3];
-	u32 pll4_num;
+	u32 pll4_ctrl;
 	u32 resv7[3];
+	u32 pll4_num;
+	u32 resv8[3];
 	u32 pll4_denom;
-	u32 resvB[3];
+	u32 resv9[3];
 	u32 pll6_ctrl;
-	u32 resv8[3];
+	u32 resv10[3];
 	u32 pll6_num;
-	u32 resv9[3];
+	u32 resv11[3];
 	u32 pll6_denom;
-	u32 resv10[7];
+	u32 resv12[7];
 	u32 pll5_ctrl;
-	u32 resv11[3];
+	u32 resv13[3];
 	u32 pll3_pfd;
-	u32 resv12[3];
+	u32 resv14[3];
 	u32 pll2_pfd;
-	u32 resv13[3];
+	u32 resv15[3];
 	u32 reg_1p1;
-	u32 resv14[3];
+	u32 resv16[3];
 	u32 reg_3p0;
-	u32 resv15[3];
+	u32 resv17[3];
 	u32 reg_2p5;
-	u32 resv16[7];
+	u32 resv18[7];
 	u32 ana_misc0;
-	u32 resv17[3];
+	u32 resv19[3];
 	u32 ana_misc1;
-	u32 resv18[63];
+	u32 resv20[63];
 	u32 anadig_digprog;
-	u32 resv19[3];
+	u32 resv21[3];
 	u32 pll1_ctrl;
-	u32 resv20[3];
+	u32 resv22[3];
 	u32 pll1_ss;
-	u32 resv21[3];
+	u32 resv23[3];
 	u32 pll1_num;
-	u32 resv22[3];
+	u32 resv24[3];
 	u32 pll1_denom;
-	u32 resv23[3];
+	u32 resv25[3];
 	u32 pll1_pdf;
-	u32 resv24[3];
+	u32 resv26[3];
 	u32 pll_lock;
 };
 #endif