Patchwork PCI: Fix comment typo for PCI_EXP_LNKCTL_LABIE

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Submitter Jingoo Han
Date Sept. 16, 2013, 7:46 a.m.
Message ID <000001ceb2b0$ea66ffd0$bf34ff70$%han@samsung.com>
Download mbox | patch
Permalink /patch/275132/
State Accepted
Headers show

Comments

Jingoo Han - Sept. 16, 2013, 7:46 a.m.
Fix trivial typo for PCI_EXP_LNKCTL_LABIE comment.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
---
 include/uapi/linux/pci_regs.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Bjorn Helgaas - Sept. 25, 2013, 12:05 a.m.
On Mon, Sep 16, 2013 at 04:46:55PM +0900, Jingoo Han wrote:
> Fix trivial typo for PCI_EXP_LNKCTL_LABIE comment.
> 
> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
> ---
>  include/uapi/linux/pci_regs.h |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index baa7852..18384bc 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -485,7 +485,7 @@
>  #define  PCI_EXP_LNKCTL_CLKREQ_EN 0x0100 /* Enable clkreq */
>  #define  PCI_EXP_LNKCTL_HAWD	0x0200	/* Hardware Autonomous Width Disable */
>  #define  PCI_EXP_LNKCTL_LBMIE	0x0400	/* Link Bandwidth Management Interrupt Enable */
> -#define  PCI_EXP_LNKCTL_LABIE	0x0800	/* Lnk Autonomous Bandwidth Interrupt Enable */
> +#define  PCI_EXP_LNKCTL_LABIE	0x0800	/* Link Autonomous Bandwidth Interrupt Enable */

I had already included this change in a large comment/whitespace cleanup
before I read this, so this should appear in v3.13.  Thanks!

>  #define PCI_EXP_LNKSTA		18	/* Link Status */
>  #define  PCI_EXP_LNKSTA_CLS	0x000f	/* Current Link Speed */
>  #define  PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */
> -- 
> 1.7.10.4
> 
> 
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Patch

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index baa7852..18384bc 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -485,7 +485,7 @@ 
 #define  PCI_EXP_LNKCTL_CLKREQ_EN 0x0100 /* Enable clkreq */
 #define  PCI_EXP_LNKCTL_HAWD	0x0200	/* Hardware Autonomous Width Disable */
 #define  PCI_EXP_LNKCTL_LBMIE	0x0400	/* Link Bandwidth Management Interrupt Enable */
-#define  PCI_EXP_LNKCTL_LABIE	0x0800	/* Lnk Autonomous Bandwidth Interrupt Enable */
+#define  PCI_EXP_LNKCTL_LABIE	0x0800	/* Link Autonomous Bandwidth Interrupt Enable */
 #define PCI_EXP_LNKSTA		18	/* Link Status */
 #define  PCI_EXP_LNKSTA_CLS	0x000f	/* Current Link Speed */
 #define  PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */