Patchwork [U-Boot,v3,07/10] config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE

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Submitter Vivek Gautam
Date Sept. 14, 2013, 8:32 a.m.
Message ID <1379147573-21897-8-git-send-email-gautam.vivek@samsung.com>
Download mbox | patch
Permalink /patch/274906/
State Awaiting Upstream
Delegated to: Marek Vasut
Headers show

Comments

Vivek Gautam - Sept. 14, 2013, 8:32 a.m.
XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
---

Changes since v2:
 - Nothing

 include/configs/exynos5250-dt.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

Patch

diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 8f8f85f..86d57e3 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -37,6 +37,8 @@ 
 /* Keep L2 Cache Disabled */
 #define CONFIG_SYS_DCACHE_OFF
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /* Enable ACE acceleration for SHA1 and SHA256 */
 #define CONFIG_EXYNOS_ACE_SHA
 #define CONFIG_SHA_HW_ACCEL