From patchwork Fri Sep 13 15:25:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrylo Tkachov X-Patchwork-Id: 274797 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7889F2C0167 for ; Sat, 14 Sep 2013 01:26:05 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=n76icgjURr2kYnuyzKBjUm37WB6Tj2WSCQCRxkHL4uu UmPz7qZWQbgKTNqiYswDlsfZZedL6T+25YHMgNEZc1YAWJygByYEvFCc7w7gnlqo kwb0wl5u2PSO8Ilc5t39q2vcpHEI6Dg7dJ3uNVSm8Du1XmX5d0iw0HYNRSza76V0 = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=GvJhzghnoBePjiyx0bQ3jxctVJY=; b=JQCPi9erAfJAz2UWy ewMHFGXqZQkMybiOH7jpIKtUeDJMu/j8+oWGTY4MfrMfNt71b0XS/2y6Pbg2r5rM vcMgLrqx7N9XSjzyZ6MWz4K1VVDOSdCARsp6/sEVZJexH1maubhLyvG/pCz6/oPl zVwSJqeapO4WHKNcFbhj2+SXic= Received: (qmail 8224 invoked by alias); 13 Sep 2013 15:26:00 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8214 invoked by uid 89); 13 Sep 2013 15:25:59 -0000 Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 13 Sep 2013 15:25:59 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_NO, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Fri, 13 Sep 2013 16:25:55 +0100 Received: from [10.1.208.24] ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 13 Sep 2013 16:25:53 +0100 Message-ID: <52332E80.7040308@arm.com> Date: Fri, 13 Sep 2013 16:25:52 +0100 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130804 Thunderbird/17.0.8 MIME-Version: 1.0 To: GCC Patches CC: Richard Earnshaw , Ramana Radhakrishnan , mikestump@comcast.net Subject: [PATCH][ARM][testsuite] Add effective target check for arm conditional execution X-MC-Unique: 113091316255500501 X-IsSubscribed: yes Hi all, gcc.target/arm/minmax_minus.c is really only valid when we have conditional execution available, that is non Thumb1-only targets. I've added an effective target check for that and used it in the test so that it does not get run and give a false negative when testing Thumb1 targets. Ok for trunk? Thanks, Kyrill 2013-09-13 Kyrylo Tkachov * lib/target-supports.exp (check_effective_target_arm_cond_exec): New procedure. * gcc.target/arm/minmax_minus.c: Check for cond_exec target. diff --git a/gcc/testsuite/gcc.target/arm/minmax_minus.c b/gcc/testsuite/gcc.target/arm/minmax_minus.c index 4c2dcdf..906342a 100644 --- a/gcc/testsuite/gcc.target/arm/minmax_minus.c +++ b/gcc/testsuite/gcc.target/arm/minmax_minus.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_cond_exec } */ /* { dg-options "-O2" } */ #define MAX(a, b) (a > b ? a : b) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 0fb135c..fbe756e 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2577,6 +2577,17 @@ proc check_effective_target_arm_thumb2 { } { } ""] } +# Return 1 if this is an ARM target where conditional execution is available. + +proc check_effective_target_arm_cond_exec { } { + return [check_no_compiler_messages arm_cond_exec assembly { + #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__) + #error FOO + #endif + int i; + } ""] +} + # Return 1 if this is an ARM cortex-M profile cpu proc check_effective_target_arm_cortex_m { } {