From patchwork Fri Sep 13 08:49:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 274693 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 312F32C0180 for ; Fri, 13 Sep 2013 18:50:32 +1000 (EST) Received: from localhost ([::1]:45497 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKP5B-0007by-Ui for incoming@patchwork.ozlabs.org; Fri, 13 Sep 2013 04:50:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37481) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKP4k-0007X9-8B for qemu-devel@nongnu.org; Fri, 13 Sep 2013 04:50:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VKP4e-00024F-Ka for qemu-devel@nongnu.org; Fri, 13 Sep 2013 04:50:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:19965) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKP4e-00024B-Cy; Fri, 13 Sep 2013 04:49:56 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r8D8ntH8010257 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 13 Sep 2013 04:49:55 -0400 Received: from blackfin.pond.sub.org (ovpn-116-22.ams2.redhat.com [10.36.116.22]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id r8D8nqbo018843 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 13 Sep 2013 04:49:54 -0400 Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0F450200BC; Fri, 13 Sep 2013 10:49:52 +0200 (CEST) From: armbru@redhat.com To: qemu-devel@nongnu.org Date: Fri, 13 Sep 2013 10:49:51 +0200 Message-Id: <1379062191-7475-1-git-send-email-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: qemu-trivial@nongnu.org Subject: [Qemu-devel] [PATCH] trace-events: Clean up with scripts/cleanup-trace-events.pl again X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Markus Armbruster Event qxl_render_blit_guest_primary_initialized is unused since commit c58c7b9, drop it. Commit 42e5b4c moved hw/ppc/xics.c to hw/intc/xics.c without updating the comment in trace-events. "scripts/cleanup-trace-events.pl trace-events | diff trace-events" is now clean again. Signed-off-by: Markus Armbruster --- trace-events | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/trace-events b/trace-events index d4dba24..9a1347b 100644 --- a/trace-events +++ b/trace-events @@ -1109,7 +1109,6 @@ qemu_spice_wakeup(uint32_t qid) "%d" qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d" # hw/display/qxl-render.c -qxl_render_blit_guest_primary_initialized(void) "" qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" qxl_render_update_area_done(void *cookie) "%p" @@ -1122,7 +1121,7 @@ spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "q spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u" spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" -# hw/ppc/xics.c +# hw/intc/xics.c xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x" xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32 xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32