From patchwork Fri Sep 13 08:43:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrylo Tkachov X-Patchwork-Id: 274689 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 75B012C016E for ; Fri, 13 Sep 2013 18:43:25 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=Lo3NU895X0XIQzIrocYFhUiJX4OswB1PnsWymfpaQoY Sui5mhTd5mNHLYoyykeUPpmqeT1kKUQLViBmB8WDzHE7LWiCP3s/bR+QL8znq0c9 VMKkz1GR2ZZsdIbIFCMRK8DZbf7T4Jz0w3Xjdc44ruiLE4MpZctwfpMcgSVnHkLM = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=WS62y/Vh3Sybt9LRcdsTL6PjP2Q=; b=YMUWnSyP+7b8PPJCJ uJvThXVBSGK4pvjfkDdJpXc+ULlVEwzb2GDn0igfEZPheqZH+Tzg4x+DtH9B05Eu hylj7BZaa0wCgudOdFa3g4R8FrRrQyFfYDZ/LPWnEQ3E2XJVlpcFUjn145YHp/rc VNLJmDRhr4UsOWGUlDQ3w/QhFg= Received: (qmail 6072 invoked by alias); 13 Sep 2013 08:43:16 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6014 invoked by uid 89); 13 Sep 2013 08:43:15 -0000 Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 13 Sep 2013 08:43:15 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_NO, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Fri, 13 Sep 2013 09:43:09 +0100 Received: from [10.1.208.24] ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 13 Sep 2013 09:43:08 +0100 Message-ID: <5232D01C.3040008@arm.com> Date: Fri, 13 Sep 2013 09:43:08 +0100 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130804 Thunderbird/17.0.8 MIME-Version: 1.0 To: GCC Patches CC: Richard Earnshaw , Ramana Radhakrishnan Subject: [PATCH][ARM] set "type" attribute properly in arm_cmpsi_insn, cleanup X-MC-Unique: 113091309430900401 X-IsSubscribed: yes Hi all, This patch splits the r/rI alternative in arm_cmpsi_insn so as to better specify the "type" attribute. Also, the predicable_short_it attribute is set properly to conform to the -mrestrict-it rules. A nearby pattern has a redundant "%?" removed. Tested arm-none-eabi on a model and bootstrapped on Chromebook. Ok for trunk? Thanks, Kyrill 2013-09-13 Kyrylo Tkachov * config/arm/arm.md (arm_cmpsi_insn): Split rI alternative. Set type attribute correctly. Set predicable_short_it attribute. (cmpsi_shiftsi): Remove %? from output template. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 423d535bfc63d8db75f233a9a73aaf23d1e83108..0000000000000000000000000000000000000000 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8194,19 +8194,21 @@ (define_insn "*addsi3_cbranch_scratch" (define_insn "*arm_cmpsi_insn" [(set (reg:CC CC_REGNUM) - (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r") - (match_operand:SI 1 "arm_add_operand" "Py,r,rI,L")))] + (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r,r") + (match_operand:SI 1 "arm_add_operand" "Py,r,r,I,L")))] "TARGET_32BIT" "@ cmp%?\\t%0, %1 cmp%?\\t%0, %1 cmp%?\\t%0, %1 + cmp%?\\t%0, %1 cmn%?\\t%0, #%n1" [(set_attr "conds" "set") - (set_attr "arch" "t2,t2,any,any") - (set_attr "length" "2,2,4,4") + (set_attr "arch" "t2,t2,any,any,any") + (set_attr "length" "2,2,4,4,4") (set_attr "predicable" "yes") - (set_attr "type" "*,*,*,arlo_imm")] + (set_attr "predicable_short_it" "yes,yes,yes,no,no") + (set_attr "type" "arlo_imm,*,*,arlo_imm,arlo_imm")] ) (define_insn "*cmpsi_shiftsi" @@ -8216,7 +8218,7 @@ (define_insn "*cmpsi_shiftsi" [(match_operand:SI 1 "s_register_operand" "r,r") (match_operand:SI 2 "shift_amount_operand" "M,rM")])))] "TARGET_32BIT" - "cmp%?\\t%0, %1%S3" + "cmp\\t%0, %1%S3" [(set_attr "conds" "set") (set_attr "shift" "1") (set_attr "arch" "32,a")