Patchwork [U-Boot,v2,1/2] net: fec_mxc: Add support for mx6 solo-lite

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Submitter Fabio Estevam
Date Sept. 13, 2013, 3:36 a.m.
Message ID <1379043388-17579-1-git-send-email-festevam@gmail.com>
Download mbox | patch
Permalink /patch/274645/
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Comments

Fabio Estevam - Sept. 13, 2013, 3:36 a.m.
From: Fabio Estevam <fabio.estevam@freescale.com>

Similarly as mx25 and mx53, mx6solo-lite needs to setup the MII gasket for RMII
mode.

Add support for mx6solo-lite.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Based on FSL BSP, which uses U-boot 2013.04.

Changes since v1:
- None

 drivers/net/fec_mxc.c | 2 +-
 drivers/net/fec_mxc.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

Patch

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index e14a359..f4a0c5d 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -453,7 +453,7 @@  static int fec_open(struct eth_device *edev)
 	 */
 	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
 		&fec->eth->ecntrl);
-#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)
 	udelay(100);
 	/*
 	 * setup the MII gasket for RMII mode
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index 4b4f8b7..0717cc6 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -135,7 +135,7 @@  struct ethernet_regs {
 
 	uint32_t res14[7];		/* MBAR_ETH + 0x2E4-2FC */
 
-#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)
 	uint16_t miigsk_cfgr;		/* MBAR_ETH + 0x300 */
 	uint16_t res15[3];		/* MBAR_ETH + 0x302-306 */
 	uint16_t miigsk_enr;		/* MBAR_ETH + 0x308 */
@@ -202,7 +202,7 @@  struct ethernet_regs {
 #define FEC_X_DES_ACTIVE_TDAR		0x01000000
 #define FEC_R_DES_ACTIVE_RDAR		0x01000000
 
-#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)
 /* defines for MIIGSK */
 /* RMII frequency control: 0=50MHz, 1=5MHz */
 #define MIIGSK_CFGR_FRCONT		(1 << 6)