From patchwork Tue May 19 23:21:07 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Hutchings X-Patchwork-Id: 27434 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@bilbo.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from ozlabs.org (ozlabs.org [203.10.76.45]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "mx.ozlabs.org", Issuer "CA Cert Signing Authority" (verified OK)) by bilbo.ozlabs.org (Postfix) with ESMTPS id BB553B707B for ; Wed, 20 May 2009 09:21:19 +1000 (EST) Received: by ozlabs.org (Postfix) id AE78EDE0BE; Wed, 20 May 2009 09:21:19 +1000 (EST) Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by ozlabs.org (Postfix) with ESMTP id 51EC2DE0B7 for ; Wed, 20 May 2009 09:21:19 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754504AbZESXVM (ORCPT ); Tue, 19 May 2009 19:21:12 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755255AbZESXVJ (ORCPT ); Tue, 19 May 2009 19:21:09 -0400 Received: from smarthost02.mail.zen.net.uk ([212.23.3.141]:43829 "EHLO smarthost02.mail.zen.net.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755238AbZESXVJ (ORCPT ); Tue, 19 May 2009 19:21:09 -0400 Received: from [82.69.137.158] (helo=opal.uk.level5networks.com) by smarthost02.mail.zen.net.uk with esmtp (Exim 4.63) (envelope-from ) id 1M6YcO-0005Xe-Kh; Tue, 19 May 2009 23:21:08 +0000 Received: from [10.17.20.50] (achroite.uk.level5networks.com [10.17.20.50]) by opal.uk.level5networks.com (8.12.8/8.12.8) with ESMTP id n4JNL7Xx031876; Wed, 20 May 2009 00:21:07 +0100 Subject: [PATCH 1/2] chelsio: Use generic XENPAK LASI register definitions From: Ben Hutchings To: David Miller Cc: Divy Le Ray , netdev@vger.kernel.org Organization: Solarflare Communications Date: Wed, 20 May 2009 00:21:07 +0100 Message-Id: <1242775267.3198.8.camel@achroite> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 (2.22.1-2.fc9) X-Originating-Smarthost02-IP: [82.69.137.158] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Signed-off-by: Ben Hutchings Acked-by: Divy Le Ray --- This follows on from: commit 1c5022eb408e5d9ce48ffbd93d6e34d6f397a1e9 Author: Ben Hutchings Date: Fri May 15 00:47:59 2009 +0100 mdio: Add XENPAK LASI register definitions These registers were originally defined for XENPAK modules, but are also implemented by many other 10G PHYs. Ben. drivers/net/chelsio/mv88x201x.c | 17 +++++++++-------- 1 files changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/net/chelsio/mv88x201x.c b/drivers/net/chelsio/mv88x201x.c index 29e0cba..d50907b 100644 --- a/drivers/net/chelsio/mv88x201x.c +++ b/drivers/net/chelsio/mv88x201x.c @@ -86,7 +86,8 @@ static int mv88x201x_reset(struct cphy *cphy, int wait) static int mv88x201x_interrupt_enable(struct cphy *cphy) { /* Enable PHY LASI interrupts. */ - cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, 0x9002, 0x1); + cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, + MDIO_PMA_LASI_LSALARM); /* Enable Marvell interrupts through Elmer0. */ if (t1_is_asic(cphy->adapter)) { @@ -102,7 +103,7 @@ static int mv88x201x_interrupt_enable(struct cphy *cphy) static int mv88x201x_interrupt_disable(struct cphy *cphy) { /* Disable PHY LASI interrupts. */ - cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, 0x9002, 0x0); + cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, 0x0); /* Disable Marvell interrupts through Elmer0. */ if (t1_is_asic(cphy->adapter)) { @@ -122,9 +123,9 @@ static int mv88x201x_interrupt_clear(struct cphy *cphy) #ifdef MV88x2010_LINK_STATUS_BUGS /* Required to read twice before clear takes affect. */ - cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9003, &val); - cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9004, &val); - cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9005, &val); + cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_RXSTAT, &val); + cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_TXSTAT, &val); + cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT, &val); /* Read this register after the others above it else * the register doesn't clear correctly. @@ -135,12 +136,12 @@ static int mv88x201x_interrupt_clear(struct cphy *cphy) /* Clear link status. */ cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val); /* Clear PHY LASI interrupts. */ - cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9005, &val); + cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT, &val); #ifdef MV88x2010_LINK_STATUS_BUGS /* Do it again. */ - cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9003, &val); - cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9004, &val); + cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_RXSTAT, &val); + cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_TXSTAT, &val); #endif /* Clear Marvell interrupts through Elmer0. */