Patchwork [U-Boot,01/12,V3] EXYNOS5: Create a common board file

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Submitter Rajeshwari Birje
Date Sept. 11, 2013, 10:01 a.m.
Message ID <1378893684-27733-2-git-send-email-rajeshwari.s@samsung.com>
Download mbox | patch
Permalink /patch/274216/
State Changes Requested
Delegated to: Minkyu Kang
Headers show

Comments

Rajeshwari Birje - Sept. 11, 2013, 10:01 a.m.
Create a common board.c file for all functions which are common across
all EXYNOS5 platforms.

exynos_init function is provided for platform cpecific code.

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
---
Changes in V2:
	- None
Changes in V3:
	- None
 arch/arm/include/asm/arch-exynos/board.h |  17 ++
 board/samsung/common/Makefile            |   4 +
 board/samsung/common/board.c             | 312 +++++++++++++++++++++++++++++++
 board/samsung/smdk5250/exynos5-dt.c      | 269 +-------------------------
 board/samsung/smdk5250/smdk5250.c        | 182 +-----------------
 include/configs/exynos5250-dt.h          |   2 +
 6 files changed, 342 insertions(+), 444 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-exynos/board.h
 create mode 100644 board/samsung/common/board.c
Simon Glass - Sept. 19, 2013, 5:50 a.m.
Hi Rajeshwari,

On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde <
rajeshwari.s@samsung.com> wrote:

> Create a common board.c file for all functions which are common across
> all EXYNOS5 platforms.
>
> exynos_init function is provided for platform cpecific code.
>

specific


>
> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
>

Acked-by: Simon Glass <sjg@chromium.org>


> ---
> Changes in V2:
>         - None
> Changes in V3:
>         - None
>  arch/arm/include/asm/arch-exynos/board.h |  17 ++
>  board/samsung/common/Makefile            |   4 +
>  board/samsung/common/board.c             | 312
> +++++++++++++++++++++++++++++++
>  board/samsung/smdk5250/exynos5-dt.c      | 269 +-------------------------
>  board/samsung/smdk5250/smdk5250.c        | 182 +-----------------
>  include/configs/exynos5250-dt.h          |   2 +
>  6 files changed, 342 insertions(+), 444 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-exynos/board.h
>  create mode 100644 board/samsung/common/board.c
>
>
m j - Sept. 19, 2013, 6:59 a.m.
Hi @Samsung,

Great that you have starting posting 5420 patches, one basic question
(a) What is the booting procedure for the secondary cores
(b) What is the booting procedure for the Little Secondary cores...

Would you be pushing the patches for these as well....

On 9/19/13, Simon Glass <sjg@chromium.org> wrote:
> Hi Rajeshwari,
>
> On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde <
> rajeshwari.s@samsung.com> wrote:
>
>> Create a common board.c file for all functions which are common across
>> all EXYNOS5 platforms.
>>
>> exynos_init function is provided for platform cpecific code.
>>
>
> specific
>
>
>>
>> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
>>
>
> Acked-by: Simon Glass <sjg@chromium.org>
>
>
>> ---
>> Changes in V2:
>>         - None
>> Changes in V3:
>>         - None
>>  arch/arm/include/asm/arch-exynos/board.h |  17 ++
>>  board/samsung/common/Makefile            |   4 +
>>  board/samsung/common/board.c             | 312
>> +++++++++++++++++++++++++++++++
>>  board/samsung/smdk5250/exynos5-dt.c      | 269
>> +-------------------------
>>  board/samsung/smdk5250/smdk5250.c        | 182 +-----------------
>>  include/configs/exynos5250-dt.h          |   2 +
>>  6 files changed, 342 insertions(+), 444 deletions(-)
>>  create mode 100644 arch/arm/include/asm/arch-exynos/board.h
>>  create mode 100644 board/samsung/common/board.c
>>
>>
>
Simon Glass - Sept. 19, 2013, 3:56 p.m.
Hi MJ,


On Thu, Sep 19, 2013 at 12:59 AM, MJ embd <mj.embd@gmail.com> wrote:

> Hi @Samsung,
>
> Great that you have starting posting 5420 patches, one basic question
> (a) What is the booting procedure for the secondary cores
> (b) What is the booting procedure for the Little Secondary cores...
>
> Would you be pushing the patches for these as well....
>

[best not to top-post]

There are patches in the Chromium tree for handling this - I expect these
will be upstreamed sometime after this initial set lands.

Regards,
Simon


>
> On 9/19/13, Simon Glass <sjg@chromium.org> wrote:
> > Hi Rajeshwari,
> >
> > On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde <
> > rajeshwari.s@samsung.com> wrote:
> >
> >> Create a common board.c file for all functions which are common across
> >> all EXYNOS5 platforms.
> >>
> >> exynos_init function is provided for platform cpecific code.
> >>
> >
> > specific
> >
> >
> >>
> >> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
> >>
> >
> > Acked-by: Simon Glass <sjg@chromium.org>
> >
> >
> >> ---
> >> Changes in V2:
> >>         - None
> >> Changes in V3:
> >>         - None
> >>  arch/arm/include/asm/arch-exynos/board.h |  17 ++
> >>  board/samsung/common/Makefile            |   4 +
> >>  board/samsung/common/board.c             | 312
> >> +++++++++++++++++++++++++++++++
> >>  board/samsung/smdk5250/exynos5-dt.c      | 269
> >> +-------------------------
> >>  board/samsung/smdk5250/smdk5250.c        | 182 +-----------------
> >>  include/configs/exynos5250-dt.h          |   2 +
> >>  6 files changed, 342 insertions(+), 444 deletions(-)
> >>  create mode 100644 arch/arm/include/asm/arch-exynos/board.h
> >>  create mode 100644 board/samsung/common/board.c
> >>
> >>
> >
>
>
> --
> -mj
>
Simon Glass - Sept. 21, 2013, 2:41 a.m.
Hi Rajeshwari,

On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde <
rajeshwari.s@samsung.com> wrote:

> Create a common board.c file for all functions which are common across
> all EXYNOS5 platforms.
>
> exynos_init function is provided for platform cpecific code.
>
> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
>

I have a few more comments after trying this out on Pit.

My source tree is here, in branch try-5420.

git://git.denx.de/u-boot-x86.git

This includes a few modifications to your patches to make them apply on
mainline, and also one patch to fix Pit:

- add a device tree
- fix a few defines (CONFIG_POWER... instead of CONFIG_PMIC)
- define CONFIG_POWER to get PS HOLD asserted (otherwise it powers off
after 1 second)
- disable MAX77686 PMIC (there is no driver for 77802)
- remove PMIC code in smdk5420.c since it is already in
board/samsung/common/board.c
- serial support for SPL, not really needed
- fix boards.cfg format
- hack tools/Makefile

With this I can boot to a prompt on Pit (I just type 'crosfw' inside the
Chrome OS chroot to build and download over USB). I suspect SMDK5420 does
not need PS_HOLD, and I think your PMIC code is not being included.

I hope this helps with your patch preparation for v4 - it would be great if
you could include Pit support as well as smdk5420. Hopefully they can use
the same config, just a different device tree.

Regards,
Simon
Rajeshwari Birje - Sept. 23, 2013, 5:14 a.m.
Hi Simon,

On Sat, Sep 21, 2013 at 8:11 AM, Simon Glass <sjg@chromium.org> wrote:

> Hi Rajeshwari,
>
> On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde <
> rajeshwari.s@samsung.com> wrote:
>
> > Create a common board.c file for all functions which are common across
> > all EXYNOS5 platforms.
> >
> > exynos_init function is provided for platform cpecific code.
> >
> > Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
> >
>
> I have a few more comments after trying this out on Pit.
>
> My source tree is here, in branch try-5420.
>
> git://git.denx.de/u-boot-x86.git
>
> This includes a few modifications to your patches to make them apply on
> mainline, and also one patch to fix Pit:
>
> - add a device tree
> - fix a few defines (CONFIG_POWER... instead of CONFIG_PMIC)
> - define CONFIG_POWER to get PS HOLD asserted (otherwise it powers off
> after 1 second)
> - disable MAX77686 PMIC (there is no driver for 77802)
> - remove PMIC code in smdk5420.c since it is already in
> board/samsung/common/board.c
> - serial support for SPL, not really needed
> - fix boards.cfg format
> - hack tools/Makefile
>
> With this I can boot to a prompt on Pit (I just type 'crosfw' inside the
> Chrome OS chroot to build and download over USB). I suspect SMDK5420 does
> not need PS_HOLD, and I think your PMIC code is not being included.
>
> I hope this helps with your patch preparation for v4 - it would be great if
> you could include Pit support as well as smdk5420. Hopefully they can use
> the same config, just a different device tree.
>
> Regards,
> Simon
> Okay, will insert these too before sending a V4 patch.
>

Patch

diff --git a/arch/arm/include/asm/arch-exynos/board.h b/arch/arm/include/asm/arch-exynos/board.h
new file mode 100644
index 0000000..243fb12
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/board.h
@@ -0,0 +1,17 @@ 
+/*
+ * (C) Copyright 2013 Samsung Electronics
+ * Rajeshwari Shinde <rajeshwari.s@samsung.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _EXYNOS_BOARD_H
+#define _EXYNOS_BOARD_H
+
+/*
+ * Exynos baord specific changes for
+ * board_init
+ */
+int exynos_init(void);
+
+#endif	/* EXYNOS_BOARD_H */
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index 9e48a7b..eab8ab2 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -11,6 +11,10 @@  LIB	= $(obj)libsamsung.o
 
 COBJS-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
 
+ifeq ($(CONFIG_SPL_BUILD),)
+COBJS-$(CONFIG_BOARD_COMMON)	+= board.o
+endif
+
 SRCS    := $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
 
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
new file mode 100644
index 0000000..bfcfbdf
--- /dev/null
+++ b/board/samsung/common/board.c
@@ -0,0 +1,312 @@ 
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <cros_ec.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <spi.h>
+#include <tmu.h>
+#include <asm/io.h>
+#include <asm/arch/board.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+#include <power/pmic.h>
+#include <power/max77686_pmic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct local_info {
+	struct cros_ec_dev *cros_ec_dev;	/* Pointer to cros_ec device */
+	int cros_ec_err;			/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
+#if defined CONFIG_EXYNOS_TMU
+/*
+ * Boot Time Thermal Analysis for SoC temperature threshold breach
+ */
+static void boot_temp_check(void)
+{
+	int temp;
+
+	switch (tmu_monitor(&temp)) {
+	case TMU_STATUS_NORMAL:
+		break;
+	/* Status TRIPPED ans WARNING means corresponding threshold breach */
+	case TMU_STATUS_TRIPPED:
+		puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
+		set_ps_hold_ctrl();
+		hang();
+		break;
+	case TMU_STATUS_WARNING:
+		puts("EXYNOS_TMU: WARNING! Temperature very high\n");
+		break;
+	/*
+	 * TMU_STATUS_INIT means something is wrong with temperature sensing
+	 * and TMU status was changed back from NORMAL to INIT.
+	 */
+	case TMU_STATUS_INIT:
+	default:
+		debug("EXYNOS_TMU: Unknown TMU state\n");
+	}
+}
+#endif
+
+int board_init(void)
+{
+	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#if defined CONFIG_EXYNOS_TMU
+	if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
+		debug("%s: Failed to init TMU\n", __func__);
+		return -1;
+	}
+	boot_temp_check();
+#endif
+
+#ifdef CONFIG_EXYNOS_SPI
+	spi_init();
+#endif
+	return exynos_init();
+}
+
+int dram_init(void)
+{
+	int i;
+	u32 addr;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+	}
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	int i;
+	u32 addr, size;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+		gd->bd->bi_dram[i].start = addr;
+		gd->bd->bi_dram[i].size = size;
+	}
+}
+
+static int board_uart_init(void)
+{
+	int err, uart_id, ret = 0;
+
+	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
+		err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+		if (err) {
+			debug("UART%d not configured\n",
+			      (uart_id - PERIPH_ID_UART0));
+			ret |= err;
+		}
+	}
+	return ret;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+	int err;
+	err = board_uart_init();
+	if (err) {
+		debug("UART init failed\n");
+		return err;
+	}
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+	board_i2c_init(gd->fdt_blob);
+#endif
+	return err;
+}
+#endif
+
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+	return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+	local.cros_ec_err = cros_ec_init(blob, &local.cros_ec_dev);
+	if (local.cros_ec_err)
+		return -1;  /* Will report in board_late_init() */
+
+	return 0;
+}
+
+#if defined(CONFIG_POWER)
+static int pmic_reg_update(struct pmic *p, int reg, uint regval)
+{
+	u32 val;
+	int ret = 0;
+
+	ret = pmic_reg_read(p, reg, &val);
+	if (ret) {
+		debug("%s: PMIC %d register read failed\n", __func__, reg);
+		return -1;
+	}
+	val |= regval;
+	ret = pmic_reg_write(p, reg, val);
+	if (ret) {
+		debug("%s: PMIC %d register write failed\n", __func__, reg);
+		return -1;
+	}
+	return 0;
+}
+
+int power_init_board(void)
+{
+	struct pmic *p;
+
+	set_ps_hold_ctrl();
+
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+	if (pmic_init(I2C_PMIC))
+		return -1;
+
+	p = pmic_get("MAX77686_PMIC");
+	if (!p)
+		return -ENODEV;
+
+	if (pmic_probe(p))
+		return -1;
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
+		return -1;
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
+			    MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
+		return -1;
+
+	/* VDD_MIF */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
+			   MAX77686_BUCK1OUT_1V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+		      MAX77686_REG_PMIC_BUCK1OUT);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
+			    MAX77686_BUCK1CTRL_EN))
+		return -1;
+
+	/* VDD_ARM */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
+			   MAX77686_BUCK2DVS1_1_3V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+		      MAX77686_REG_PMIC_BUCK2DVS1);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
+			    MAX77686_BUCK2CTRL_ON))
+		return -1;
+
+	/* VDD_INT */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
+			   MAX77686_BUCK3DVS1_1_0125V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+		      MAX77686_REG_PMIC_BUCK3DVS1);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
+			    MAX77686_BUCK3CTRL_ON))
+		return -1;
+
+	/* VDD_G3D */
+	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
+			   MAX77686_BUCK4DVS1_1_2V)) {
+		debug("%s: PMIC %d register write failed\n", __func__,
+		      MAX77686_REG_PMIC_BUCK4DVS1);
+		return -1;
+	}
+
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
+			    MAX77686_BUCK3CTRL_ON))
+		return -1;
+
+	/* VDD_LDO2 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
+			    MAX77686_LD02CTRL1_1_5V | EN_LDO))
+		return -1;
+
+	/* VDD_LDO3 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
+			    MAX77686_LD03CTRL1_1_8V | EN_LDO))
+		return -1;
+
+	/* VDD_LDO5 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
+			    MAX77686_LD05CTRL1_1_8V | EN_LDO))
+		return -1;
+
+	/* VDD_LDO10 */
+	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
+			    MAX77686_LD10CTRL1_1_8V | EN_LDO))
+		return -1;
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+	stdio_print_current_devices();
+
+	if (local.cros_ec_err) {
+		/* Force console on */
+		gd->flags &= ~GD_FLG_SILENT;
+
+		printf("cros-ec communications failure %d\n",
+		       local.cros_ec_err);
+		puts("\nPlease reset with Power+Refresh\n\n");
+		panic("Cannot init cros-ec device");
+		return -1;
+	}
+	return 0;
+}
+#endif
+
+int arch_early_init_r(void)
+{
+#ifdef CONFIG_CROS_EC
+	if (board_init_cros_ec_devices(gd->fdt_blob)) {
+		printf("%s: Failed to init EC\n", __func__);
+		return 0;
+	}
+#endif
+
+	return 0;
+}
diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c
index bb4a82f..36634e6 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -14,6 +14,7 @@ 
 #include <spi.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/dwmmc.h>
+#include <asm/arch/board.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/pinmux.h>
@@ -25,44 +26,8 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined CONFIG_EXYNOS_TMU
-/*
- * Boot Time Thermal Analysis for SoC temperature threshold breach
- */
-static void boot_temp_check(void)
-{
-	int temp;
-
-	switch (tmu_monitor(&temp)) {
-	/* Status TRIPPED ans WARNING means corresponding threshold breach */
-	case TMU_STATUS_TRIPPED:
-		puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
-		set_ps_hold_ctrl();
-		hang();
-		break;
-	case TMU_STATUS_WARNING:
-		puts("EXYNOS_TMU: WARNING! Temperature very high\n");
-		break;
-	/*
-	 * TMU_STATUS_INIT means something is wrong with temperature sensing
-	 * and TMU status was changed back from NORMAL to INIT.
-	 */
-	case TMU_STATUS_INIT:
-	default:
-		debug("EXYNOS_TMU: Unknown TMU state\n");
-	}
-}
-#endif
-
-struct local_info {
-	struct cros_ec_dev *cros_ec_dev;	/* Pointer to cros_ec device */
-	int cros_ec_err;			/* Error for cros_ec, 0 if ok */
-};
-
-static struct local_info local;
-
 #ifdef CONFIG_USB_EHCI_EXYNOS
-int board_usb_vbus_init(void)
+static void board_usb_vbus_init(void)
 {
 	struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
 						samsung_get_base_gpio_part1();
@@ -72,13 +37,11 @@  int board_usb_vbus_init(void)
 
 	/* VBUS turn ON time */
 	mdelay(3);
-
-	return 0;
 }
 #endif
 
 #ifdef CONFIG_SOUND_MAX98095
-static void  board_enable_audio_codec(void)
+static void board_enable_audio_codec(void)
 {
 	struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
 						samsung_get_base_gpio_part1();
@@ -89,39 +52,8 @@  static void  board_enable_audio_codec(void)
 }
 #endif
 
-struct cros_ec_dev *board_get_cros_ec_dev(void)
-{
-	return local.cros_ec_dev;
-}
-
-static int board_init_cros_ec_devices(const void *blob)
+int exynos_init(void)
 {
-	local.cros_ec_err = cros_ec_init(blob, &local.cros_ec_dev);
-	if (local.cros_ec_err)
-		return -1;  /* Will report in board_late_init() */
-
-	return 0;
-}
-
-int board_init(void)
-{
-	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
-
-#if defined CONFIG_EXYNOS_TMU
-	if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
-		debug("%s: Failed to init TMU\n", __func__);
-		return -1;
-	}
-	boot_temp_check();
-#endif
-
-#ifdef CONFIG_EXYNOS_SPI
-	spi_init();
-#endif
-
-	if (board_init_cros_ec_devices(gd->fdt_blob))
-		return -1;
-
 #ifdef CONFIG_USB_EHCI_EXYNOS
 	board_usb_vbus_init();
 #endif
@@ -131,149 +63,6 @@  int board_init(void)
 	return 0;
 }
 
-int dram_init(void)
-{
-	int i;
-	u32 addr;
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
-		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
-	}
-	return 0;
-}
-
-#if defined(CONFIG_POWER)
-static int pmic_reg_update(struct pmic *p, int reg, uint regval)
-{
-	u32 val;
-	int ret = 0;
-
-	ret = pmic_reg_read(p, reg, &val);
-	if (ret) {
-		debug("%s: PMIC %d register read failed\n", __func__, reg);
-		return -1;
-	}
-	val |= regval;
-	ret = pmic_reg_write(p, reg, val);
-	if (ret) {
-		debug("%s: PMIC %d register write failed\n", __func__, reg);
-		return -1;
-	}
-	return 0;
-}
-
-int power_init_board(void)
-{
-	struct pmic *p;
-
-	set_ps_hold_ctrl();
-
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
-	if (pmic_init(I2C_PMIC))
-		return -1;
-
-	p = pmic_get("MAX77686_PMIC");
-	if (!p)
-		return -ENODEV;
-
-	if (pmic_probe(p))
-		return -1;
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
-		return -1;
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
-			    MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
-		return -1;
-
-	/* VDD_MIF */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
-			   MAX77686_BUCK1OUT_1V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK1OUT);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
-			    MAX77686_BUCK1CTRL_EN))
-		return -1;
-
-	/* VDD_ARM */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
-			   MAX77686_BUCK2DVS1_1_3V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK2DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
-			    MAX77686_BUCK2CTRL_ON))
-		return -1;
-
-	/* VDD_INT */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
-			   MAX77686_BUCK3DVS1_1_0125V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK3DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
-			    MAX77686_BUCK3CTRL_ON))
-		return -1;
-
-	/* VDD_G3D */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
-			   MAX77686_BUCK4DVS1_1_2V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-		      MAX77686_REG_PMIC_BUCK4DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
-			    MAX77686_BUCK3CTRL_ON))
-		return -1;
-
-	/* VDD_LDO2 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
-			    MAX77686_LD02CTRL1_1_5V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO3 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
-			    MAX77686_LD03CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO5 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
-			    MAX77686_LD05CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO10 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
-			    MAX77686_LD10CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	return 0;
-}
-#endif
-
-void dram_init_banksize(void)
-{
-	int i;
-	u32 addr, size;
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
-		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
-
-		gd->bd->bi_dram[i].start = addr;
-		gd->bd->bi_dram[i].size = size;
-	}
-}
-
 static int decode_sromc(const void *blob, struct fdt_sromc *config)
 {
 	int err;
@@ -377,37 +166,6 @@  int board_mmc_init(bd_t *bis)
 }
 #endif
 
-static int board_uart_init(void)
-{
-	int err, uart_id, ret = 0;
-
-	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
-		err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
-		if (err) {
-			debug("UART%d not configured\n",
-			      (uart_id - PERIPH_ID_UART0));
-			ret |= err;
-		}
-	}
-	return ret;
-}
-
-#ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
-{
-	int err;
-	err = board_uart_init();
-	if (err) {
-		debug("UART init failed\n");
-		return err;
-	}
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-	board_i2c_init(gd->fdt_blob);
-#endif
-	return err;
-}
-#endif
-
 #ifdef CONFIG_LCD
 void exynos_cfg_lcd_gpio(void)
 {
@@ -431,22 +189,3 @@  void exynos_set_dp_phy(unsigned int onoff)
 	set_dp_phy_ctrl(onoff);
 }
 #endif
-
-#ifdef CONFIG_BOARD_LATE_INIT
-int board_late_init(void)
-{
-	stdio_print_current_devices();
-
-	if (local.cros_ec_err) {
-		/* Force console on */
-		gd->flags &= ~GD_FLG_SILENT;
-
-		printf("cros-ec communications failure %d\n",
-		       local.cros_ec_err);
-		puts("\nPlease reset with Power+Refresh\n\n");
-		panic("Cannot init cros-ec device");
-		return -1;
-	}
-	return 0;
-}
-#endif
diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index 97fe0ad..943c29a 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -5,6 +5,7 @@ 
  */
 
 #include <common.h>
+#include <cros_ec.h>
 #include <fdtdec.h>
 #include <asm/io.h>
 #include <errno.h>
@@ -26,7 +27,7 @@ 
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_USB_EHCI_EXYNOS
-int board_usb_vbus_init(void)
+static int board_usb_vbus_init(void)
 {
 	struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
 						samsung_get_base_gpio_part1();
@@ -53,13 +54,8 @@  static void  board_enable_audio_codec(void)
 }
 #endif
 
-int board_init(void)
+int exynos_init(void)
 {
-	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
-
-#ifdef CONFIG_EXYNOS_SPI
-	spi_init();
-#endif
 #ifdef CONFIG_USB_EHCI_EXYNOS
 	board_usb_vbus_init();
 #endif
@@ -69,147 +65,6 @@  int board_init(void)
 	return 0;
 }
 
-int dram_init(void)
-{
-	int i;
-	u32 addr;
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
-		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
-	}
-	return 0;
-}
-
-#if defined(CONFIG_POWER)
-static int pmic_reg_update(struct pmic *p, int reg, uint regval)
-{
-	u32 val;
-	int ret = 0;
-
-	ret = pmic_reg_read(p, reg, &val);
-	if (ret) {
-		debug("%s: PMIC %d register read failed\n", __func__, reg);
-		return -1;
-	}
-	val |= regval;
-	ret = pmic_reg_write(p, reg, val);
-	if (ret) {
-		debug("%s: PMIC %d register write failed\n", __func__, reg);
-		return -1;
-	}
-	return 0;
-}
-
-int power_init_board(void)
-{
-	struct pmic *p;
-
-	set_ps_hold_ctrl();
-
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
-	if (pmic_init(I2C_PMIC))
-		return -1;
-
-	p = pmic_get("MAX77686_PMIC");
-	if (!p)
-		return -ENODEV;
-
-	if (pmic_probe(p))
-		return -1;
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
-		return -1;
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
-				MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
-		return -1;
-
-	/* VDD_MIF */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
-						MAX77686_BUCK1OUT_1_05V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-						MAX77686_REG_PMIC_BUCK1OUT);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
-						MAX77686_BUCK1CTRL_EN))
-		return -1;
-
-	/* VDD_ARM */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
-					MAX77686_BUCK2DVS1_1_3V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-						MAX77686_REG_PMIC_BUCK2DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
-					MAX77686_BUCK2CTRL_ON))
-		return -1;
-
-	/* VDD_INT */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
-					MAX77686_BUCK3DVS1_1_0125V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-						MAX77686_REG_PMIC_BUCK3DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
-					MAX77686_BUCK3CTRL_ON))
-		return -1;
-
-	/* VDD_G3D */
-	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
-					MAX77686_BUCK4DVS1_1_2V)) {
-		debug("%s: PMIC %d register write failed\n", __func__,
-						MAX77686_REG_PMIC_BUCK4DVS1);
-		return -1;
-	}
-
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
-					MAX77686_BUCK3CTRL_ON))
-		return -1;
-
-	/* VDD_LDO2 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
-				MAX77686_LD02CTRL1_1_5V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO3 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
-				MAX77686_LD03CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO5 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
-				MAX77686_LD05CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	/* VDD_LDO10 */
-	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
-				MAX77686_LD10CTRL1_1_8V | EN_LDO))
-		return -1;
-
-	return 0;
-}
-#endif
-
-void dram_init_banksize(void)
-{
-	int i;
-	u32 addr, size;
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
-		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
-		gd->bd->bi_dram[i].start = addr;
-		gd->bd->bi_dram[i].size = size;
-	}
-}
-
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_SMC911X
@@ -301,21 +156,6 @@  int board_mmc_init(bd_t *bis)
 }
 #endif
 
-static int board_uart_init(void)
-{
-	int err, uart_id, ret = 0;
-
-	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
-		err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
-		if (err) {
-			debug("UART%d not configured\n",
-			      (uart_id - PERIPH_ID_UART0));
-			ret |= err;
-		}
-	}
-	return ret;
-}
-
 void board_i2c_init(const void *blob)
 {
 	int i;
@@ -326,22 +166,6 @@  void board_i2c_init(const void *blob)
 	}
 }
 
-#ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
-{
-	int err;
-	err = board_uart_init();
-	if (err) {
-		debug("UART init failed\n");
-		return err;
-	}
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-	board_i2c_init(NULL);
-#endif
-	return err;
-}
-#endif
-
 #ifdef CONFIG_LCD
 void exynos_cfg_lcd_gpio(void)
 {
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 2b93a45..26ef7fa 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -21,6 +21,8 @@ 
 #define CONFIG_ARCH_CPU_INIT
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_COMMON
+#define CONFIG_ARCH_EARLY_INIT_R
 
 /* Enable fdt support for Exynos5250 */
 #define CONFIG_ARCH_DEVICE_TREE		exynos5250