From patchwork Wed Sep 11 07:34:51 2013
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Subject: [1/4] Using gen_int_mode instead of GEN_INT
X-Patchwork-Submitter: Richard Sandiford
X-Patchwork-Id: 274149
Message-Id: <87hadrn750.fsf@talisman.default>
To: James Greenhalgh
Cc: "gcc-patches\@gcc.gnu.org" ,
"richard.guenther\@gmail.com"
Date: Wed, 11 Sep 2013 08:34:51 +0100
From: Richard Sandiford
List-Id:
James Greenhalgh writes:
> On Tue, Sep 10, 2013 at 08:09:42PM +0100, Richard Sandiford wrote:
>> Sorry for the breakage. gen_int_mode and GEN_INT really are only for
>> scalar integers though. (So is plus_constant.) Vector constants should
>> be CONST_VECTORs rather than CONST_INTs.
>>
>> I think the gcc.target/aarch64/vect-fcm-eq-d.c failure is from a latent
>> bug in the way (neg (not ...)) and (not (neg ...)) are handled.
>> Could you give the attached patch a go?
>
> Thanks Richard, this patch fixes the test FAILs I was seeing.
Now bootstrapped & regression-tested on x86_64-linux-gnu. OK to install?
Thanks,
Richard
gcc/
* simplify-rtx.c (simplify_unary_operation_1): Use simplify_gen_binary
for (not (neg ...)) and (neg (not ...)) casees.
Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c 2013-09-10 20:02:08.756091875 +0100
+++ gcc/simplify-rtx.c 2013-09-10 20:02:09.002093907 +0100
@@ -825,7 +825,8 @@ simplify_unary_operation_1 (enum rtx_cod
/* Similarly, (not (neg X)) is (plus X -1). */
if (GET_CODE (op) == NEG)
- return plus_constant (mode, XEXP (op, 0), -1);
+ return simplify_gen_binary (PLUS, mode, XEXP (op, 0),
+ CONSTM1_RTX (mode));
/* (not (xor X C)) for C constant is (xor X D) with D = ~C. */
if (GET_CODE (op) == XOR
@@ -932,7 +933,8 @@ simplify_unary_operation_1 (enum rtx_cod
/* Similarly, (neg (not X)) is (plus X 1). */
if (GET_CODE (op) == NOT)
- return plus_constant (mode, XEXP (op, 0), 1);
+ return simplify_gen_binary (PLUS, mode, XEXP (op, 0),
+ CONST1_RTX (mode));
/* (neg (minus X Y)) can become (minus Y X). This transformation
isn't safe for modes with signed zeros, since if X and Y are