From patchwork Wed Sep 11 05:56:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dongsheng Wang X-Patchwork-Id: 274118 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 7D11C2C049E for ; Wed, 11 Sep 2013 16:01:16 +1000 (EST) Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe001.messaging.microsoft.com [216.32.181.181]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "MSIT Machine Auth CA 2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 7AD812C035C for ; Wed, 11 Sep 2013 16:00:44 +1000 (EST) Received: from mail193-ch1-R.bigfish.com (10.43.68.247) by CH1EHSOBE009.bigfish.com (10.43.70.59) with Microsoft SMTP Server id 14.1.225.22; Wed, 11 Sep 2013 06:00:39 +0000 Received: from mail193-ch1 (localhost [127.0.0.1]) by mail193-ch1-R.bigfish.com (Postfix) with ESMTP id 26DEF380074; Wed, 11 Sep 2013 06:00:39 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 11 X-BigFish: VS11(z52aeszzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h1de097h8275bhz2dh2a8h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1155h) Received: from mail193-ch1 (localhost.localdomain [127.0.0.1]) by mail193-ch1 (MessageSwitch) id 1378879236325603_31019; Wed, 11 Sep 2013 06:00:36 +0000 (UTC) Received: from CH1EHSMHS007.bigfish.com (snatpool2.int.messaging.microsoft.com [10.43.68.230]) by mail193-ch1.bigfish.com (Postfix) with ESMTP id 4B5123000A8; Wed, 11 Sep 2013 06:00:36 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS007.bigfish.com (10.43.70.7) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 11 Sep 2013 06:00:36 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 11 Sep 2013 06:00:35 +0000 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r8B60RRf023128; Tue, 10 Sep 2013 23:00:33 -0700 From: Dongsheng Wang To: Subject: [PATCH v3 2/4] powerpc/85xx: add hardware automatically enter altivec idle state Date: Wed, 11 Sep 2013 13:56:42 +0800 Message-ID: <1378879004-2446-2-git-send-email-dongsheng.wang@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1378879004-2446-1-git-send-email-dongsheng.wang@freescale.com> References: <1378879004-2446-1-git-send-email-dongsheng.wang@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Cc: linuxppc-dev@lists.ozlabs.org, Wang Dongsheng X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16rc2 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Wang Dongsheng Each core's AltiVec unit may be placed into a power savings mode by turning off power to the unit. Core hardware will automatically power down the AltiVec unit after no AltiVec instructions have executed in N cycles. The AltiVec power-control is triggered by hardware. Signed-off-by: Wang Dongsheng --- *v3: Assembly code instead of C code. *v2: Remove: delete setup_idle_hw_governor function. delete "Fix erratum" for rev1. Move: move setup_* into __setup/restore_cpu_e6500. arch/powerpc/kernel/cpu_setup_fsl_booke.S | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 1.8.0 diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index bfb18c7..3c03c109 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S @@ -53,11 +53,30 @@ _GLOBAL(__e500_dcache_setup) isync blr +/* + * FIXME - We don't know the AltiVec application scenarios. + */ +#define AV_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */ +_GLOBAL(setup_altivec_idle) + mfspr r3, SPRN_PWRMGTCR0 + + /* Enable Altivec Idle */ + oris r3, r3, PWRMGTCR0_AV_IDLE_PD_EN@h + li r4, AV_WAIT_IDLE_BIT + + /* Set Automatic AltiVec Idle Count */ + rlwimi r3, r4, PWRMGTCR0_AV_IDLE_CNT_SHIFT, PWRMGTCR0_AV_IDLE_CNT + + mtspr SPRN_PWRMGTCR0, r3 + + blr + _GLOBAL(__setup_cpu_e6500) mflr r6 #ifdef CONFIG_PPC64 bl .setup_altivec_ivors #endif + bl .setup_altivec_idle bl __setup_cpu_e5500 mtlr r6 blr @@ -119,6 +138,7 @@ _GLOBAL(__setup_cpu_e5500) _GLOBAL(__restore_cpu_e6500) mflr r5 bl .setup_altivec_ivors + bl .setup_altivec_idle bl __restore_cpu_e5500 mtlr r5 blr