From patchwork Tue Sep 10 12:57:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Yukhin X-Patchwork-Id: 273856 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A40F82C009E for ; Tue, 10 Sep 2013 22:58:31 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=WryUz3ofvTCGDssve tloeDv/6jJV50ktcIkDrHq//nc1i1wYCrW2VuqHp81LoeVlPJEass9Wwgvzbnxi5 kmrH//uQM3iHpSRNiM7Y3hhBLnVAyQQBvPNQpEbUECVaEf/O42cus5crJRHR3U8O cW1i3NRcx8gJ6XptDLPDMDPI+8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=default; bh=kqW1FUNtjvMKqAADAFzheNQ nWMk=; b=Phvx4PfWhlk4cOay/9Mz8Y5RehLh5no7eQGLK2hZFeXCU8PdfbYzfzu 1PONFitemo8g6UVqw9NpUJ9rKhy/7QQtiCO0j7fjcpGy0EZ0nTxZlZ6u+ONz1rCC Z/X1s8Of4g/ogQJIZBpTz1dcYmxgrre+JbizWQGDbmNeMt2eLLQg= Received: (qmail 19751 invoked by alias); 10 Sep 2013 12:58:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19741 invoked by uid 89); 10 Sep 2013 12:58:24 -0000 Received: from mail-pb0-f54.google.com (HELO mail-pb0-f54.google.com) (209.85.160.54) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 10 Sep 2013 12:58:24 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.8 required=5.0 tests=ALL_TRUSTED, AWL, BAYES_00, FREEMAIL_FROM autolearn=ham version=3.3.2 X-HELO: mail-pb0-f54.google.com Received: by mail-pb0-f54.google.com with SMTP id ro12so7571364pbb.27 for ; Tue, 10 Sep 2013 05:58:22 -0700 (PDT) X-Received: by 10.68.196.2 with SMTP id ii2mr25293572pbc.86.1378817902061; Tue, 10 Sep 2013 05:58:22 -0700 (PDT) Received: from msticlxl57.ims.intel.com (fmdmzpr03-ext.fm.intel.com. [192.55.54.38]) by mx.google.com with ESMTPSA id ha10sm22884526pbc.23.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 10 Sep 2013 05:58:20 -0700 (PDT) Date: Tue, 10 Sep 2013 16:57:51 +0400 From: Kirill Yukhin To: Richard Henderson Cc: Vladimir Makarov , Uros Bizjak , Jakub Jelinek , GCC Patches Subject: Re: [PATCH i386 2/8] [AVX512] Add mask registers. Message-ID: <20130910125751.GB42257@msticlxl57.ims.intel.com> References: <521B8445.20602@redhat.com> <20130827181133.GA42618@msticlxl57.ims.intel.com> <521D06EC.4000709@redhat.com> <20130828174536.GA47152@msticlxl57.ims.intel.com> <521E398B.8010103@redhat.com> <20130828183805.GA14518@msticlxl57.ims.intel.com> <521E5AD8.5090604@redhat.com> <20130828220508.GB14518@msticlxl57.ims.intel.com> <20130829115920.GC14518@msticlxl57.ims.intel.com> <522E07DE.2050707@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <522E07DE.2050707@redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Hello Richard, Thanks for inputs. On 09 Sep 10:39, Richard Henderson wrote: > gen_andhi_1 is not used, nor is it likely to be in the future, therefore this > should still have "*". We're using it in patch 6/8 when introducing plugins: + { OPTION_MASK_ISA_AVX512F, CODE_FOR_andhi_1, "__builtin_ia32_kandhi", IX86_BUILTIN_KAND16, UNKNOWN, (int) HI_FTYPE_HI_HI }, And covered by tests in patch 8/8: new file mode 100644 index 0000000..3d777c8 > > > +(define_insn "hi_1" > > + [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!Yk") > > + (any_or:HI > > + (match_operand:HI 1 "nonimmediate_operand" "%0,0,Yk") > > + (match_operand:HI 2 "general_operand" ",r,Yk"))) > > + (clobber (reg:CC FLAGS_REG))] > > Likewise. Same as above. Do you still think we need "*"? --- Thanks, K --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-kandnw-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "kandnw\[ \\t\]+\[^\n\]*%k\[1-7\]" 1 } } */ + +#include + +void +avx512f_test () +{ + __mmask16 k1, k2, k3; + volatile __m512 x; + + __asm__( "kmovw %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovw %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _mm512_kandn (k1, k2); + x = _mm512_mask_add_ps (x, k3, x, x); +}