Patchwork [6/6] radeon: Use pcie_get_readrq() and pcie_set_readrq() to simplify code

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Submitter Yijing Wang
Date Sept. 9, 2013, 1:13 p.m.
Message ID <1378732388-4508-7-git-send-email-wangyijing@huawei.com>
Download mbox | patch
Permalink /patch/273567/
State Accepted
Headers show

Comments

Yijing Wang - Sept. 9, 2013, 1:13 p.m.
Use pcie_get_readrq() and pcie_set_readrq() functions to simplify code.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 drivers/gpu/drm/radeon/evergreen.c |   19 ++++++-------------
 1 files changed, 6 insertions(+), 13 deletions(-)
Bjorn Helgaas - Oct. 4, 2013, 8:44 p.m.
[-cc unrelated folks, +cc Alex, Christian]

On Mon, Sep 9, 2013 at 7:13 AM, Yijing Wang <wangyijing@huawei.com> wrote:
> Use pcie_get_readrq() and pcie_set_readrq() functions to simplify code.
>
> Signed-off-by: Yijing Wang <wangyijing@huawei.com>

I believe the following patch is correct, and I'd be happy to merge it
via the PCI tree along with the rest of this series.

But it'd be better to have an ack from Alex, and he might prefer to
merge it directly.

Bjorn

> ---
>  drivers/gpu/drm/radeon/evergreen.c |   19 ++++++-------------
>  1 files changed, 6 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index d5b49e3..b191f92 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -1169,23 +1169,16 @@ int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
>
>  void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
>  {
> -       u16 ctl, v;
> -       int err;
> -
> -       err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl);
> -       if (err)
> -               return;
> -
> -       v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12;
> +       int readrq;
> +       u16 v;
>
> +       readrq = pcie_get_readrq(rdev->pdev);
> +       v = ffs(readrq) - 8;
>         /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it
>          * to avoid hangs or perfomance issues
>          */
> -       if ((v == 0) || (v == 6) || (v == 7)) {
> -               ctl &= ~PCI_EXP_DEVCTL_READRQ;
> -               ctl |= (2 << 12);
> -               pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl);
> -       }
> +       if ((v == 0) || (v == 6) || (v == 7))
> +               pcie_set_readrq(rdev->pdev, 512);
>  }
>
>  static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc)
> --
> 1.7.1
>
>
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Deucher, Alexander - Oct. 7, 2013, 12:15 p.m.
> -----Original Message-----
> From: Bjorn Helgaas [mailto:bhelgaas@google.com]
> Sent: Friday, October 04, 2013 4:45 PM
> To: Yijing Wang
> Cc: David Airlie; linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org;
> Hanjun Guo; Deucher, Alexander; Koenig, Christian
> Subject: Re: [PATCH 6/6] radeon: Use pcie_get_readrq() and
> pcie_set_readrq() to simplify code
> 
> [-cc unrelated folks, +cc Alex, Christian]
> 
> On Mon, Sep 9, 2013 at 7:13 AM, Yijing Wang <wangyijing@huawei.com>
> wrote:
> > Use pcie_get_readrq() and pcie_set_readrq() functions to simplify code.
> >
> > Signed-off-by: Yijing Wang <wangyijing@huawei.com>
> 
> I believe the following patch is correct, and I'd be happy to merge it
> via the PCI tree along with the rest of this series.
> 
> But it'd be better to have an ack from Alex, and he might prefer to
> merge it directly.

Patch looks correct to me.  Feel free to merge it via the pci tree.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> 
> Bjorn
> 
> > ---
> >  drivers/gpu/drm/radeon/evergreen.c |   19 ++++++-------------
> >  1 files changed, 6 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/radeon/evergreen.c
> b/drivers/gpu/drm/radeon/evergreen.c
> > index d5b49e3..b191f92 100644
> > --- a/drivers/gpu/drm/radeon/evergreen.c
> > +++ b/drivers/gpu/drm/radeon/evergreen.c
> > @@ -1169,23 +1169,16 @@ int evergreen_set_uvd_clocks(struct
> radeon_device *rdev, u32 vclk, u32 dclk)
> >
> >  void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
> >  {
> > -       u16 ctl, v;
> > -       int err;
> > -
> > -       err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl);
> > -       if (err)
> > -               return;
> > -
> > -       v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12;
> > +       int readrq;
> > +       u16 v;
> >
> > +       readrq = pcie_get_readrq(rdev->pdev);
> > +       v = ffs(readrq) - 8;
> >         /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it
> >          * to avoid hangs or perfomance issues
> >          */
> > -       if ((v == 0) || (v == 6) || (v == 7)) {
> > -               ctl &= ~PCI_EXP_DEVCTL_READRQ;
> > -               ctl |= (2 << 12);
> > -               pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl);
> > -       }
> > +       if ((v == 0) || (v == 6) || (v == 7))
> > +               pcie_set_readrq(rdev->pdev, 512);
> >  }
> >
> >  static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc)
> > --
> > 1.7.1
> >
> >


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Bjorn Helgaas - Oct. 7, 2013, 6:30 p.m.
On Mon, Oct 7, 2013 at 6:15 AM, Deucher, Alexander
<Alexander.Deucher@amd.com> wrote:
>> -----Original Message-----
>> From: Bjorn Helgaas [mailto:bhelgaas@google.com]
>> Sent: Friday, October 04, 2013 4:45 PM
>> To: Yijing Wang
>> Cc: David Airlie; linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org;
>> Hanjun Guo; Deucher, Alexander; Koenig, Christian
>> Subject: Re: [PATCH 6/6] radeon: Use pcie_get_readrq() and
>> pcie_set_readrq() to simplify code
>>
>> [-cc unrelated folks, +cc Alex, Christian]
>>
>> On Mon, Sep 9, 2013 at 7:13 AM, Yijing Wang <wangyijing@huawei.com>
>> wrote:
>> > Use pcie_get_readrq() and pcie_set_readrq() functions to simplify code.
>> >
>> > Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>>
>> I believe the following patch is correct, and I'd be happy to merge it
>> via the PCI tree along with the rest of this series.
>>
>> But it'd be better to have an ack from Alex, and he might prefer to
>> merge it directly.
>
> Patch looks correct to me.  Feel free to merge it via the pci tree.
>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Thanks, I'll add your Reviewed-by and merge it.

Bjorn

>> > ---
>> >  drivers/gpu/drm/radeon/evergreen.c |   19 ++++++-------------
>> >  1 files changed, 6 insertions(+), 13 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/radeon/evergreen.c
>> b/drivers/gpu/drm/radeon/evergreen.c
>> > index d5b49e3..b191f92 100644
>> > --- a/drivers/gpu/drm/radeon/evergreen.c
>> > +++ b/drivers/gpu/drm/radeon/evergreen.c
>> > @@ -1169,23 +1169,16 @@ int evergreen_set_uvd_clocks(struct
>> radeon_device *rdev, u32 vclk, u32 dclk)
>> >
>> >  void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
>> >  {
>> > -       u16 ctl, v;
>> > -       int err;
>> > -
>> > -       err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl);
>> > -       if (err)
>> > -               return;
>> > -
>> > -       v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12;
>> > +       int readrq;
>> > +       u16 v;
>> >
>> > +       readrq = pcie_get_readrq(rdev->pdev);
>> > +       v = ffs(readrq) - 8;
>> >         /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it
>> >          * to avoid hangs or perfomance issues
>> >          */
>> > -       if ((v == 0) || (v == 6) || (v == 7)) {
>> > -               ctl &= ~PCI_EXP_DEVCTL_READRQ;
>> > -               ctl |= (2 << 12);
>> > -               pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl);
>> > -       }
>> > +       if ((v == 0) || (v == 6) || (v == 7))
>> > +               pcie_set_readrq(rdev->pdev, 512);
>> >  }
>> >
>> >  static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc)
>> > --
>> > 1.7.1
>> >
>> >
>
>
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Patch

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index d5b49e3..b191f92 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1169,23 +1169,16 @@  int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
 
 void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
 {
-	u16 ctl, v;
-	int err;
-
-	err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl);
-	if (err)
-		return;
-
-	v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12;
+	int readrq;
+	u16 v;
 
+	readrq = pcie_get_readrq(rdev->pdev);
+	v = ffs(readrq) - 8;
 	/* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it
 	 * to avoid hangs or perfomance issues
 	 */
-	if ((v == 0) || (v == 6) || (v == 7)) {
-		ctl &= ~PCI_EXP_DEVCTL_READRQ;
-		ctl |= (2 << 12);
-		pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl);
-	}
+	if ((v == 0) || (v == 6) || (v == 7))
+		pcie_set_readrq(rdev->pdev, 512);
 }
 
 static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc)