From patchwork Mon Sep 9 12:21:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Modra X-Patchwork-Id: 273559 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "www.sourceware.org", Issuer "StartCom Class 1 Primary Intermediate Server CA" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 3F9C52C012B for ; Mon, 9 Sep 2013 22:21:45 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=r63KCb2QKbXtO+FYAKoMQz3KDmiUPybe7YRiusmVpnmnM9w9Gj rPEjtD18EIGR1p8s+EHB1vnizz5N2yJXdjT+sTx9nKvgtbjrkOekC4641y9ocHzA h10WtAptzRqgTwl6CnTPE7ERWzUcEhNb9G8V1Hw0/zoJnUbMdsvfoadvU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=iRjvhum2TxXbsLKFLECpATOHlHc=; b=UzIbpEV4VsTa3FMNUBL5 syg0TO6RK0ALHlUXZhXu1aK6iGXw1mba+XbRX9fR+PsdDBp7YcLyo0a7xQNmqKy7 3L5VWYhtFvM9bIt/3ARo5Sd0uR0LO77goAVoJCfovnRLBMXPF4jAxMb6R38kOtkM AMQ6jgU3HIxNN70ceKA7Eo0= Received: (qmail 6886 invoked by alias); 9 Sep 2013 12:21:39 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6875 invoked by uid 89); 9 Sep 2013 12:21:39 -0000 Received: from mail-pd0-f171.google.com (HELO mail-pd0-f171.google.com) (209.85.192.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Mon, 09 Sep 2013 12:21:39 +0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=ALL_TRUSTED, AWL, BAYES_00, FREEMAIL_FROM autolearn=ham version=3.3.2 X-HELO: mail-pd0-f171.google.com Received: by mail-pd0-f171.google.com with SMTP id g10so6111651pdj.16 for ; Mon, 09 Sep 2013 05:21:37 -0700 (PDT) X-Received: by 10.68.88.161 with SMTP id bh1mr1374239pbb.200.1378729297010; Mon, 09 Sep 2013 05:21:37 -0700 (PDT) Received: from bubble.grove.modra.org ([101.166.26.37]) by mx.google.com with ESMTPSA id xn12sm17299523pac.12.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 09 Sep 2013 05:21:36 -0700 (PDT) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id F089CEA0077; Mon, 9 Sep 2013 21:51:31 +0930 (CST) Date: Mon, 9 Sep 2013 21:51:31 +0930 From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: David Edelsohn Subject: [RS6000] Fix PR58330 powerpc64 atomic store split in two Message-ID: <20130909122131.GD2643@bubble.grove.modra.org> Mail-Followup-To: gcc-patches@gcc.gnu.org, David Edelsohn MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes This patch prevents the powerpc backend from combining a 64-bit volatile load or store with a bswap insn when the resulting combined insn will be implemented as two lwbrx or stwbrx machine insns. Bootstrapped and regression tested powerpc64-linux. PR target/58330 * config/rs6000/rs6000.md (bswapdi2_64bit): Disable for volatile mems. gcc/testsuite/ * gcc.target/powerpc/pr58330.c: New. Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 202351) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -2376,7 +2376,9 @@ (clobber (match_scratch:DI 3 "=&r,&r,&r")) (clobber (match_scratch:DI 4 "=&r,X,&r"))] "TARGET_POWERPC64 && !TARGET_LDBRX - && (REG_P (operands[0]) || REG_P (operands[1]))" + && (REG_P (operands[0]) || REG_P (operands[1])) + && !(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0])) + && !(MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1]))" "#" [(set_attr "length" "16,12,36")]) Index: gcc/testsuite/gcc.target/powerpc/pr58330.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr58330.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/pr58330.c (revision 0) @@ -0,0 +1,11 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O -mno-popcntb" } */ +/* { dg-final { scan-assembler-not "stwbrx" } } */ + +void +write_reverse (unsigned long *addr, unsigned long val) +{ + unsigned long reverse = __builtin_bswap64 (val); + __atomic_store_n (addr, reverse, __ATOMIC_RELAXED); +}